memory.json (18920B)
1[ 2 { 3 "BriefDescription": "Counts the number of machine clears due to memory order conflicts.", 4 "Counter": "0,1,2,3", 5 "CounterHTOff": "0,1,2,3,4,5,6,7", 6 "EventCode": "0xC3", 7 "EventName": "MACHINE_CLEARS.MEMORY_ORDERING", 8 "SampleAfterValue": "100003", 9 "UMask": "0x2" 10 }, 11 { 12 "BriefDescription": "Loads with latency value being above 128", 13 "Counter": "3", 14 "CounterHTOff": "3", 15 "EventCode": "0xCD", 16 "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_128", 17 "MSRIndex": "0x3F6", 18 "MSRValue": "0x80", 19 "PEBS": "2", 20 "PublicDescription": "Loads with latency value being above 128.", 21 "SampleAfterValue": "1009", 22 "TakenAlone": "1", 23 "UMask": "0x1" 24 }, 25 { 26 "BriefDescription": "Loads with latency value being above 16", 27 "Counter": "3", 28 "CounterHTOff": "3", 29 "EventCode": "0xCD", 30 "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_16", 31 "MSRIndex": "0x3F6", 32 "MSRValue": "0x10", 33 "PEBS": "2", 34 "PublicDescription": "Loads with latency value being above 16.", 35 "SampleAfterValue": "20011", 36 "TakenAlone": "1", 37 "UMask": "0x1" 38 }, 39 { 40 "BriefDescription": "Loads with latency value being above 256", 41 "Counter": "3", 42 "CounterHTOff": "3", 43 "EventCode": "0xCD", 44 "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_256", 45 "MSRIndex": "0x3F6", 46 "MSRValue": "0x100", 47 "PEBS": "2", 48 "PublicDescription": "Loads with latency value being above 256.", 49 "SampleAfterValue": "503", 50 "TakenAlone": "1", 51 "UMask": "0x1" 52 }, 53 { 54 "BriefDescription": "Loads with latency value being above 32", 55 "Counter": "3", 56 "CounterHTOff": "3", 57 "EventCode": "0xCD", 58 "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_32", 59 "MSRIndex": "0x3F6", 60 "MSRValue": "0x20", 61 "PEBS": "2", 62 "PublicDescription": "Loads with latency value being above 32.", 63 "SampleAfterValue": "100007", 64 "TakenAlone": "1", 65 "UMask": "0x1" 66 }, 67 { 68 "BriefDescription": "Loads with latency value being above 4", 69 "Counter": "3", 70 "CounterHTOff": "3", 71 "EventCode": "0xCD", 72 "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_4", 73 "MSRIndex": "0x3F6", 74 "MSRValue": "0x4", 75 "PEBS": "2", 76 "PublicDescription": "Loads with latency value being above 4.", 77 "SampleAfterValue": "100003", 78 "TakenAlone": "1", 79 "UMask": "0x1" 80 }, 81 { 82 "BriefDescription": "Loads with latency value being above 512", 83 "Counter": "3", 84 "CounterHTOff": "3", 85 "EventCode": "0xCD", 86 "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_512", 87 "MSRIndex": "0x3F6", 88 "MSRValue": "0x200", 89 "PEBS": "2", 90 "PublicDescription": "Loads with latency value being above 512.", 91 "SampleAfterValue": "101", 92 "TakenAlone": "1", 93 "UMask": "0x1" 94 }, 95 { 96 "BriefDescription": "Loads with latency value being above 64", 97 "Counter": "3", 98 "CounterHTOff": "3", 99 "EventCode": "0xCD", 100 "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_64", 101 "MSRIndex": "0x3F6", 102 "MSRValue": "0x40", 103 "PEBS": "2", 104 "PublicDescription": "Loads with latency value being above 64.", 105 "SampleAfterValue": "2003", 106 "TakenAlone": "1", 107 "UMask": "0x1" 108 }, 109 { 110 "BriefDescription": "Loads with latency value being above 8", 111 "Counter": "3", 112 "CounterHTOff": "3", 113 "EventCode": "0xCD", 114 "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_8", 115 "MSRIndex": "0x3F6", 116 "MSRValue": "0x8", 117 "PEBS": "2", 118 "PublicDescription": "Loads with latency value being above 8.", 119 "SampleAfterValue": "50021", 120 "TakenAlone": "1", 121 "UMask": "0x1" 122 }, 123 { 124 "BriefDescription": "Sample stores and collect precise store operation via PEBS record. PMC3 only.", 125 "Counter": "3", 126 "CounterHTOff": "3", 127 "EventCode": "0xCD", 128 "EventName": "MEM_TRANS_RETIRED.PRECISE_STORE", 129 "PEBS": "2", 130 "PRECISE_STORE": "1", 131 "SampleAfterValue": "2000003", 132 "TakenAlone": "1", 133 "UMask": "0x2" 134 }, 135 { 136 "BriefDescription": "Speculative cache line split load uops dispatched to L1 cache", 137 "Counter": "0,1,2,3", 138 "CounterHTOff": "0,1,2,3,4,5,6,7", 139 "EventCode": "0x05", 140 "EventName": "MISALIGN_MEM_REF.LOADS", 141 "PublicDescription": "Speculative cache-line split load uops dispatched to L1D.", 142 "SampleAfterValue": "2000003", 143 "UMask": "0x1" 144 }, 145 { 146 "BriefDescription": "Speculative cache line split STA uops dispatched to L1 cache", 147 "Counter": "0,1,2,3", 148 "CounterHTOff": "0,1,2,3,4,5,6,7", 149 "EventCode": "0x05", 150 "EventName": "MISALIGN_MEM_REF.STORES", 151 "PublicDescription": "Speculative cache-line split Store-address uops dispatched to L1D.", 152 "SampleAfterValue": "2000003", 153 "UMask": "0x2" 154 }, 155 { 156 "BriefDescription": "Counts all demand & prefetch code reads that miss the LLC", 157 "Counter": "0,1,2,3", 158 "CounterHTOff": "0,1,2,3", 159 "EventCode": "0xB7, 0xBB", 160 "EventName": "OFFCORE_RESPONSE.ALL_CODE_RD.LLC_MISS.ANY_RESPONSE", 161 "MSRIndex": "0x1a6,0x1a7", 162 "MSRValue": "0x3fffc00244", 163 "Offcore": "1", 164 "SampleAfterValue": "100003", 165 "UMask": "0x1" 166 }, 167 { 168 "BriefDescription": "Counts all demand & prefetch code reads that miss the LLC and the data returned from remote dram", 169 "Counter": "0,1,2,3", 170 "CounterHTOff": "0,1,2,3", 171 "EventCode": "0xB7, 0xBB", 172 "EventName": "OFFCORE_RESPONSE.ALL_CODE_RD.LLC_MISS.REMOTE_DRAM", 173 "MSRIndex": "0x1a6,0x1a7", 174 "MSRValue": "0x67f800244", 175 "Offcore": "1", 176 "SampleAfterValue": "100003", 177 "UMask": "0x1" 178 }, 179 { 180 "BriefDescription": "Counts all demand & prefetch code reads that miss the LLC and the data forwarded from remote cache", 181 "Counter": "0,1,2,3", 182 "CounterHTOff": "0,1,2,3", 183 "EventCode": "0xB7, 0xBB", 184 "EventName": "OFFCORE_RESPONSE.ALL_CODE_RD.LLC_MISS.REMOTE_HIT_FORWARD", 185 "MSRIndex": "0x1a6,0x1a7", 186 "MSRValue": "0x87f800244", 187 "Offcore": "1", 188 "SampleAfterValue": "100003", 189 "UMask": "0x1" 190 }, 191 { 192 "BriefDescription": "Counts all demand & prefetch data reads that hits the LLC", 193 "Counter": "0,1,2,3", 194 "CounterHTOff": "0,1,2,3", 195 "EventCode": "0xB7, 0xBB", 196 "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.LLC_MISS.ANY_RESPONSE", 197 "MSRIndex": "0x1a6,0x1a7", 198 "MSRValue": "0x3fffc20091", 199 "Offcore": "1", 200 "SampleAfterValue": "100003", 201 "UMask": "0x1" 202 }, 203 { 204 "BriefDescription": "Counts all data/code/rfo reads (demand & prefetch) that hit the LLC", 205 "Counter": "0,1,2,3", 206 "CounterHTOff": "0,1,2,3", 207 "EventCode": "0xB7, 0xBB", 208 "EventName": "OFFCORE_RESPONSE.ALL_READS.LLC_MISS.ANY_RESPONSE", 209 "MSRIndex": "0x1a6,0x1a7", 210 "MSRValue": "0x3fffc203f7", 211 "Offcore": "1", 212 "SampleAfterValue": "100003", 213 "UMask": "0x1" 214 }, 215 { 216 "BriefDescription": "Counts all data/code/rfo reads (demand & prefetch) that miss the LLC and the data returned from local dram", 217 "Counter": "0,1,2,3", 218 "CounterHTOff": "0,1,2,3", 219 "EventCode": "0xB7, 0xBB", 220 "EventName": "OFFCORE_RESPONSE.ALL_READS.LLC_MISS.LOCAL_DRAM", 221 "MSRIndex": "0x1a6,0x1a7", 222 "MSRValue": "0x6004003f7", 223 "Offcore": "1", 224 "SampleAfterValue": "100003", 225 "UMask": "0x1" 226 }, 227 { 228 "BriefDescription": "Counts all data/code/rfo reads (demand & prefetch) that miss the LLC the data is found in M state in remote cache and forwarded from there", 229 "Counter": "0,1,2,3", 230 "CounterHTOff": "0,1,2,3", 231 "EventCode": "0xB7, 0xBB", 232 "EventName": "OFFCORE_RESPONSE.ALL_READS.LLC_MISS.REMOTE_HITM", 233 "MSRIndex": "0x1a6,0x1a7", 234 "MSRValue": "0x107fc003f7", 235 "Offcore": "1", 236 "SampleAfterValue": "100003", 237 "UMask": "0x1" 238 }, 239 { 240 "BriefDescription": "Counts all data/code/rfo reads (demand & prefetch) that miss the LLC and the data forwarded from remote cache", 241 "Counter": "0,1,2,3", 242 "CounterHTOff": "0,1,2,3", 243 "EventCode": "0xB7, 0xBB", 244 "EventName": "OFFCORE_RESPONSE.ALL_READS.LLC_MISS.REMOTE_HIT_FORWARD", 245 "MSRIndex": "0x1a6,0x1a7", 246 "MSRValue": "0x87f8203f7", 247 "Offcore": "1", 248 "SampleAfterValue": "100003", 249 "UMask": "0x1" 250 }, 251 { 252 "BriefDescription": "Counts all demand code reads that miss the LLC", 253 "Counter": "0,1,2,3", 254 "CounterHTOff": "0,1,2,3", 255 "EventCode": "0xB7, 0xBB", 256 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.LLC_MISS.ANY_RESPONSE", 257 "MSRIndex": "0x1a6,0x1a7", 258 "MSRValue": "0x3fffc20004", 259 "Offcore": "1", 260 "SampleAfterValue": "100003", 261 "UMask": "0x1" 262 }, 263 { 264 "BriefDescription": "Counts all demand code reads that miss the LLC and the data returned from local dram", 265 "Counter": "0,1,2,3", 266 "CounterHTOff": "0,1,2,3", 267 "EventCode": "0xB7, 0xBB", 268 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.LLC_MISS.LOCAL_DRAM", 269 "MSRIndex": "0x1a6,0x1a7", 270 "MSRValue": "0x600400004", 271 "Offcore": "1", 272 "SampleAfterValue": "100003", 273 "UMask": "0x1" 274 }, 275 { 276 "BriefDescription": "Counts all demand code reads that miss the LLC and the data returned from remote dram", 277 "Counter": "0,1,2,3", 278 "CounterHTOff": "0,1,2,3", 279 "EventCode": "0xB7, 0xBB", 280 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.LLC_MISS.REMOTE_DRAM", 281 "MSRIndex": "0x1a6,0x1a7", 282 "MSRValue": "0x67f800004", 283 "Offcore": "1", 284 "SampleAfterValue": "100003", 285 "UMask": "0x1" 286 }, 287 { 288 "BriefDescription": "Counts all demand code reads that miss the LLC the data is found in M state in remote cache and forwarded from there", 289 "Counter": "0,1,2,3", 290 "CounterHTOff": "0,1,2,3", 291 "EventCode": "0xB7, 0xBB", 292 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.LLC_MISS.REMOTE_HITM", 293 "MSRIndex": "0x1a6,0x1a7", 294 "MSRValue": "0x107fc00004", 295 "Offcore": "1", 296 "SampleAfterValue": "100003", 297 "UMask": "0x1" 298 }, 299 { 300 "BriefDescription": "Counts all demand code reads that miss the LLC and the data forwarded from remote cache", 301 "Counter": "0,1,2,3", 302 "CounterHTOff": "0,1,2,3", 303 "EventCode": "0xB7, 0xBB", 304 "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.LLC_MISS.REMOTE_HIT_FORWARD", 305 "MSRIndex": "0x1a6,0x1a7", 306 "MSRValue": "0x87f820004", 307 "Offcore": "1", 308 "SampleAfterValue": "100003", 309 "UMask": "0x1" 310 }, 311 { 312 "BriefDescription": "Counts demand data reads that miss the LLC and the data returned from remote & local dram", 313 "Counter": "0,1,2,3", 314 "CounterHTOff": "0,1,2,3", 315 "EventCode": "0xB7, 0xBB", 316 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.LLC_MISS.ANY_DRAM", 317 "MSRIndex": "0x1a6,0x1a7", 318 "MSRValue": "0x67fc00001", 319 "Offcore": "1", 320 "SampleAfterValue": "100003", 321 "UMask": "0x1" 322 }, 323 { 324 "BriefDescription": "Counts demand data reads that miss in the LLC", 325 "Counter": "0,1,2,3", 326 "CounterHTOff": "0,1,2,3", 327 "EventCode": "0xB7, 0xBB", 328 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.LLC_MISS.ANY_RESPONSE", 329 "MSRIndex": "0x1a6,0x1a7", 330 "MSRValue": "0x3fffc20001", 331 "Offcore": "1", 332 "SampleAfterValue": "100003", 333 "UMask": "0x1" 334 }, 335 { 336 "BriefDescription": "Counts demand data reads that miss the LLC and the data returned from local dram", 337 "Counter": "0,1,2,3", 338 "CounterHTOff": "0,1,2,3", 339 "EventCode": "0xB7, 0xBB", 340 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.LLC_MISS.LOCAL_DRAM", 341 "MSRIndex": "0x1a6,0x1a7", 342 "MSRValue": "0x600400001", 343 "Offcore": "1", 344 "SampleAfterValue": "100003", 345 "UMask": "0x1" 346 }, 347 { 348 "BriefDescription": "Counts demand data reads that miss the LLC and the data returned from remote dram", 349 "Counter": "0,1,2,3", 350 "CounterHTOff": "0,1,2,3", 351 "EventCode": "0xB7, 0xBB", 352 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.LLC_MISS.REMOTE_DRAM", 353 "MSRIndex": "0x1a6,0x1a7", 354 "MSRValue": "0x67f800001", 355 "Offcore": "1", 356 "SampleAfterValue": "100003", 357 "UMask": "0x1" 358 }, 359 { 360 "BriefDescription": "Counts demand data reads that miss the LLC the data is found in M state in remote cache and forwarded from there", 361 "Counter": "0,1,2,3", 362 "CounterHTOff": "0,1,2,3", 363 "EventCode": "0xB7, 0xBB", 364 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.LLC_MISS.REMOTE_HITM", 365 "MSRIndex": "0x1a6,0x1a7", 366 "MSRValue": "0x107fc00001", 367 "Offcore": "1", 368 "SampleAfterValue": "100003", 369 "UMask": "0x1" 370 }, 371 { 372 "BriefDescription": "Counts demand data reads that miss the LLC and the data forwarded from remote cache", 373 "Counter": "0,1,2,3", 374 "CounterHTOff": "0,1,2,3", 375 "EventCode": "0xB7, 0xBB", 376 "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.LLC_MISS.REMOTE_HIT_FORWARD", 377 "MSRIndex": "0x1a6,0x1a7", 378 "MSRValue": "0x87f820001", 379 "Offcore": "1", 380 "SampleAfterValue": "100003", 381 "UMask": "0x1" 382 }, 383 { 384 "BriefDescription": "Counts all demand data writes (RFOs) that miss the LLC and the data is found in M state in remote cache and forwarded from there.", 385 "Counter": "0,1,2,3", 386 "CounterHTOff": "0,1,2,3", 387 "EventCode": "0xB7, 0xBB", 388 "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.LLC_MISS.REMOTE_HITM", 389 "MSRIndex": "0x1a6,0x1a7", 390 "MSRValue": "0x107fc20002", 391 "Offcore": "1", 392 "SampleAfterValue": "100003", 393 "UMask": "0x1" 394 }, 395 { 396 "BriefDescription": "Counts all prefetch (that bring data to L2) code reads that miss the LLC and the data returned from remote & local dram", 397 "Counter": "0,1,2,3", 398 "CounterHTOff": "0,1,2,3", 399 "EventCode": "0xB7, 0xBB", 400 "EventName": "OFFCORE_RESPONSE.PF_L2_CODE_RD.LLC_MISS.ANY_RESPONSE", 401 "MSRIndex": "0x1a6,0x1a7", 402 "MSRValue": "0x3fffc20040", 403 "Offcore": "1", 404 "SampleAfterValue": "100003", 405 "UMask": "0x1" 406 }, 407 { 408 "BriefDescription": "Counts prefetch (that bring data to L2) data reads that miss the LLC and the data returned from remote & local dram", 409 "Counter": "0,1,2,3", 410 "CounterHTOff": "0,1,2,3", 411 "EventCode": "0xB7, 0xBB", 412 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.LLC_MISS.ANY_DRAM", 413 "MSRIndex": "0x1a6,0x1a7", 414 "MSRValue": "0x67fc00010", 415 "Offcore": "1", 416 "SampleAfterValue": "100003", 417 "UMask": "0x1" 418 }, 419 { 420 "BriefDescription": "Counts prefetch (that bring data to L2) data reads that miss in the LLC", 421 "Counter": "0,1,2,3", 422 "CounterHTOff": "0,1,2,3", 423 "EventCode": "0xB7, 0xBB", 424 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.LLC_MISS.ANY_RESPONSE", 425 "MSRIndex": "0x1a6,0x1a7", 426 "MSRValue": "0x3fffc20010", 427 "Offcore": "1", 428 "SampleAfterValue": "100003", 429 "UMask": "0x1" 430 }, 431 { 432 "BriefDescription": "Counts prefetch (that bring data to L2) data reads that miss the LLC and the data returned from local dram", 433 "Counter": "0,1,2,3", 434 "CounterHTOff": "0,1,2,3", 435 "EventCode": "0xB7, 0xBB", 436 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.LLC_MISS.LOCAL_DRAM", 437 "MSRIndex": "0x1a6,0x1a7", 438 "MSRValue": "0x600400010", 439 "Offcore": "1", 440 "SampleAfterValue": "100003", 441 "UMask": "0x1" 442 }, 443 { 444 "BriefDescription": "Counts prefetch (that bring data to L2) data reads that miss the LLC and the data returned from remote dram", 445 "Counter": "0,1,2,3", 446 "CounterHTOff": "0,1,2,3", 447 "EventCode": "0xB7, 0xBB", 448 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.LLC_MISS.REMOTE_DRAM", 449 "MSRIndex": "0x1a6,0x1a7", 450 "MSRValue": "0x67f800010", 451 "Offcore": "1", 452 "SampleAfterValue": "100003", 453 "UMask": "0x1" 454 }, 455 { 456 "BriefDescription": "Counts prefetch (that bring data to L2) data reads that miss the LLC the data is found in M state in remote cache and forwarded from there", 457 "Counter": "0,1,2,3", 458 "CounterHTOff": "0,1,2,3", 459 "EventCode": "0xB7, 0xBB", 460 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.LLC_MISS.REMOTE_HITM", 461 "MSRIndex": "0x1a6,0x1a7", 462 "MSRValue": "0x107fc00010", 463 "Offcore": "1", 464 "SampleAfterValue": "100003", 465 "UMask": "0x1" 466 }, 467 { 468 "BriefDescription": "Counts prefetch (that bring data to L2) data reads that miss the LLC and the data forwarded from remote cache", 469 "Counter": "0,1,2,3", 470 "CounterHTOff": "0,1,2,3", 471 "EventCode": "0xB7, 0xBB", 472 "EventName": "OFFCORE_RESPONSE.PF_L2_DATA_RD.LLC_MISS.REMOTE_HIT_FORWARD", 473 "MSRIndex": "0x1a6,0x1a7", 474 "MSRValue": "0x87f820010", 475 "Offcore": "1", 476 "SampleAfterValue": "100003", 477 "UMask": "0x1" 478 }, 479 { 480 "BriefDescription": "Counts all prefetch (that bring data to LLC only) code reads that miss in the LLC", 481 "Counter": "0,1,2,3", 482 "CounterHTOff": "0,1,2,3", 483 "EventCode": "0xB7, 0xBB", 484 "EventName": "OFFCORE_RESPONSE.PF_LLC_CODE_RD.LLC_MISS.ANY_RESPONSE", 485 "MSRIndex": "0x1a6,0x1a7", 486 "MSRValue": "0x3fffc20200", 487 "Offcore": "1", 488 "SampleAfterValue": "100003", 489 "UMask": "0x1" 490 }, 491 { 492 "BriefDescription": "Counts prefetch (that bring data to LLC only) data reads that miss in the LLC", 493 "Counter": "0,1,2,3", 494 "CounterHTOff": "0,1,2,3", 495 "EventCode": "0xB7, 0xBB", 496 "EventName": "OFFCORE_RESPONSE.PF_LLC_DATA_RD.LLC_MISS.ANY_RESPONSE", 497 "MSRIndex": "0x1a6,0x1a7", 498 "MSRValue": "0x3fffc20080", 499 "Offcore": "1", 500 "SampleAfterValue": "100003", 501 "UMask": "0x1" 502 } 503]