cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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floating-point.json (1801B)

      1[
      2    {
      3        "BriefDescription": "Counts the number of floating operations retired that required microcode assists",
      4        "Counter": "0,1",
      5        "EventCode": "0xC3",
      6        "EventName": "MACHINE_CLEARS.FP_ASSIST",
      7        "PublicDescription": "This event counts the number of times that the pipeline stalled due to FP operations needing assists.",
      8        "SampleAfterValue": "200003",
      9        "UMask": "0x4"
     10    },
     11    {
     12        "BriefDescription": "Counts the number of vector SSE, AVX, AVX2, AVX-512 micro-ops retired. More specifically, it counts packed SSE, AVX, AVX2, AVX-512 micro-ops (both floating point and integer) except for loads (memory-to-register mov-type micro-ops), packed byte and word multiplies.",
     13        "Counter": "0,1",
     14        "EventCode": "0xC2",
     15        "EventName": "UOPS_RETIRED.PACKED_SIMD",
     16        "PublicDescription": "This event counts the number of packed vector SSE, AVX, AVX2, and AVX-512 micro-ops retired (floating point, integer and store) except for loads (memory-to-register mov-type micro-ops), packed byte and word multiplies.",
     17        "SampleAfterValue": "200003",
     18        "UMask": "0x40"
     19    },
     20    {
     21        "BriefDescription": "Counts the number of scalar SSE, AVX, AVX2, AVX-512 micro-ops retired. More specifically, it counts scalar SSE, AVX, AVX2, AVX-512 micro-ops except for loads (memory-to-register mov-type micro ops), division, sqrt.",
     22        "Counter": "0,1",
     23        "EventCode": "0xC2",
     24        "EventName": "UOPS_RETIRED.SCALAR_SIMD",
     25        "PublicDescription": "This event counts the number of scalar SSE, AVX, AVX2, AVX-512 micro-ops retired (floating point, integer and store) except for loads (memory-to-register mov-type micro ops), division, sqrt.",
     26        "SampleAfterValue": "200003",
     27        "UMask": "0x20"
     28    }
     29]