cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

virtual-memory.json (2611B)

      1[
      2    {
      3        "BriefDescription": "Counts the number of load micro-ops retired that cause a DTLB miss",
      4        "Counter": "0,1",
      5        "Data_LA": "1",
      6        "EventCode": "0x04",
      7        "EventName": "MEM_UOPS_RETIRED.DTLB_MISS_LOADS",
      8        "PEBS": "1",
      9        "SampleAfterValue": "200003",
     10        "UMask": "0x8"
     11    },
     12    {
     13        "BriefDescription": "Counts the total number of core cycles for all the page walks. The cycles for page walks started in speculative path will also be included.",
     14        "Counter": "0,1",
     15        "EventCode": "0x05",
     16        "EventName": "PAGE_WALKS.CYCLES",
     17        "PublicDescription": "This event counts every cycle when a data (D) page walk or instruction (I) page walk is in progress.",
     18        "SampleAfterValue": "200003",
     19        "UMask": "0x3"
     20    },
     21    {
     22        "BriefDescription": "Counts the total number of core cycles for all the D-side page walks. The cycles for page walks started in speculative path will also be included.",
     23        "Counter": "0,1",
     24        "EventCode": "0x05",
     25        "EventName": "PAGE_WALKS.D_SIDE_CYCLES",
     26        "SampleAfterValue": "200003",
     27        "UMask": "0x1"
     28    },
     29    {
     30        "BriefDescription": "Counts the total D-side page walks that are completed or started. The page walks started in the speculative path will also be counted",
     31        "Counter": "0,1",
     32        "EdgeDetect": "1",
     33        "EventCode": "0x05",
     34        "EventName": "PAGE_WALKS.D_SIDE_WALKS",
     35        "SampleAfterValue": "100003",
     36        "UMask": "0x1"
     37    },
     38    {
     39        "BriefDescription": "Counts the total number of core cycles for all the I-side page walks. The cycles for page walks started in speculative path will also be included.",
     40        "Counter": "0,1",
     41        "EventCode": "0x05",
     42        "EventName": "PAGE_WALKS.I_SIDE_CYCLES",
     43        "PublicDescription": "This event counts every cycle when an I-side (walks due to an instruction fetch) page walk is in progress.",
     44        "SampleAfterValue": "200003",
     45        "UMask": "0x2"
     46    },
     47    {
     48        "BriefDescription": "Counts the total I-side page walks that are completed.",
     49        "Counter": "0,1",
     50        "EdgeDetect": "1",
     51        "EventCode": "0x05",
     52        "EventName": "PAGE_WALKS.I_SIDE_WALKS",
     53        "SampleAfterValue": "100003",
     54        "UMask": "0x2"
     55    },
     56    {
     57        "BriefDescription": "Counts the total page walks that are completed (I-side and D-side)",
     58        "Counter": "0,1",
     59        "EdgeDetect": "1",
     60        "EventCode": "0x05",
     61        "EventName": "PAGE_WALKS.WALKS",
     62        "SampleAfterValue": "100003",
     63        "UMask": "0x3"
     64    }
     65]