spr-metrics.json (29556B)
1[ 2 { 3 "BriefDescription": "Total pipeline cost of branch related instructions (used for program control-flow including function calls)", 4 "MetricExpr": "100 * (( BR_INST_RETIRED.COND + 3 * BR_INST_RETIRED.NEAR_CALL + (BR_INST_RETIRED.NEAR_TAKEN - BR_INST_RETIRED.COND_TAKEN - 2 * BR_INST_RETIRED.NEAR_CALL) ) / TOPDOWN.SLOTS)", 5 "MetricGroup": "Ret", 6 "MetricName": "Branching_Overhead" 7 }, 8 { 9 "BriefDescription": "Instructions Per Cycle (per Logical Processor)", 10 "MetricExpr": "INST_RETIRED.ANY / CPU_CLK_UNHALTED.THREAD", 11 "MetricGroup": "Ret;Summary", 12 "MetricName": "IPC" 13 }, 14 { 15 "BriefDescription": "Cycles Per Instruction (per Logical Processor)", 16 "MetricExpr": "1 / (INST_RETIRED.ANY / CPU_CLK_UNHALTED.THREAD)", 17 "MetricGroup": "Pipeline;Mem", 18 "MetricName": "CPI" 19 }, 20 { 21 "BriefDescription": "Per-Logical Processor actual clocks when the Logical Processor is active.", 22 "MetricExpr": "CPU_CLK_UNHALTED.THREAD", 23 "MetricGroup": "Pipeline", 24 "MetricName": "CLKS" 25 }, 26 { 27 "BriefDescription": "Total issue-pipeline slots (per-Physical Core till ICL; per-Logical Processor ICL onward)", 28 "MetricExpr": "TOPDOWN.SLOTS", 29 "MetricGroup": "TmaL1", 30 "MetricName": "SLOTS" 31 }, 32 { 33 "BriefDescription": "Fraction of Physical Core issue-slots utilized by this Logical Processor", 34 "MetricExpr": "TOPDOWN.SLOTS / ( TOPDOWN.SLOTS / 2 ) if #SMT_on else 1", 35 "MetricGroup": "SMT;TmaL1", 36 "MetricName": "Slots_Utilization" 37 }, 38 { 39 "BriefDescription": "The ratio of Executed- by Issued-Uops", 40 "MetricExpr": "UOPS_EXECUTED.THREAD / UOPS_ISSUED.ANY", 41 "MetricGroup": "Cor;Pipeline", 42 "MetricName": "Execute_per_Issue", 43 "PublicDescription": "The ratio of Executed- by Issued-Uops. Ratio > 1 suggests high rate of uop micro-fusions. Ratio < 1 suggest high rate of \"execute\" at rename stage." 44 }, 45 { 46 "BriefDescription": "Instructions Per Cycle across hyper-threads (per physical core)", 47 "MetricExpr": "INST_RETIRED.ANY / CPU_CLK_UNHALTED.DISTRIBUTED", 48 "MetricGroup": "Ret;SMT;TmaL1", 49 "MetricName": "CoreIPC" 50 }, 51 { 52 "BriefDescription": "Floating Point Operations Per Cycle", 53 "MetricExpr": "( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE + FP_ARITH_INST_RETIRED2.SCALAR_HALF ) + 2 * ( FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + FP_ARITH_INST_RETIRED2.COMPLEX_SCALAR_HALF ) + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * ( FP_ARITH_INST_RETIRED2.128B_PACKED_HALF + FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE ) + 16 * ( FP_ARITH_INST_RETIRED2.256B_PACKED_HALF + FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE ) + 32 * FP_ARITH_INST_RETIRED2.512B_PACKED_HALF + 4 * AMX_OPS_RETIRED.BF16 ) / CPU_CLK_UNHALTED.DISTRIBUTED", 54 "MetricGroup": "Ret;Flops", 55 "MetricName": "FLOPc" 56 }, 57 { 58 "BriefDescription": "Actual per-core usage of the Floating Point non-X87 execution units (regardless of precision or vector-width)", 59 "MetricExpr": "( FP_ARITH_DISPATCHED.PORT_0 + FP_ARITH_DISPATCHED.PORT_1 + FP_ARITH_DISPATCHED.PORT_5 ) / ( 2 * CPU_CLK_UNHALTED.DISTRIBUTED )", 60 "MetricGroup": "Cor;Flops;HPC", 61 "MetricName": "FP_Arith_Utilization", 62 "PublicDescription": "Actual per-core usage of the Floating Point non-X87 execution units (regardless of precision or vector-width). Values > 1 are possible due to ([BDW+] Fused-Multiply Add (FMA) counting - common; [ADL+] use all of ADD/MUL/FMA in Scalar or 128/256-bit vectors - less common)." 63 }, 64 { 65 "BriefDescription": "Instruction-Level-Parallelism (average number of uops executed when there is execution) per-core", 66 "MetricExpr": "UOPS_EXECUTED.THREAD / (( UOPS_EXECUTED.CORE_CYCLES_GE_1 / 2 ) if #SMT_on else UOPS_EXECUTED.CORE_CYCLES_GE_1)", 67 "MetricGroup": "Backend;Cor;Pipeline;PortsUtil", 68 "MetricName": "ILP" 69 }, 70 { 71 "BriefDescription": "Core actual clocks when any Logical Processor is active on the Physical Core", 72 "MetricExpr": "CPU_CLK_UNHALTED.DISTRIBUTED", 73 "MetricGroup": "SMT", 74 "MetricName": "CORE_CLKS" 75 }, 76 { 77 "BriefDescription": "Instructions per Load (lower number means higher occurrence rate)", 78 "MetricExpr": "INST_RETIRED.ANY / MEM_INST_RETIRED.ALL_LOADS", 79 "MetricGroup": "InsType", 80 "MetricName": "IpLoad" 81 }, 82 { 83 "BriefDescription": "Instructions per Store (lower number means higher occurrence rate)", 84 "MetricExpr": "INST_RETIRED.ANY / MEM_INST_RETIRED.ALL_STORES", 85 "MetricGroup": "InsType", 86 "MetricName": "IpStore" 87 }, 88 { 89 "BriefDescription": "Instructions per Branch (lower number means higher occurrence rate)", 90 "MetricExpr": "INST_RETIRED.ANY / BR_INST_RETIRED.ALL_BRANCHES", 91 "MetricGroup": "Branches;Fed;InsType", 92 "MetricName": "IpBranch" 93 }, 94 { 95 "BriefDescription": "Instructions per (near) call (lower number means higher occurrence rate)", 96 "MetricExpr": "INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_CALL", 97 "MetricGroup": "Branches;Fed;PGO", 98 "MetricName": "IpCall" 99 }, 100 { 101 "BriefDescription": "Instruction per taken branch", 102 "MetricExpr": "INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_TAKEN", 103 "MetricGroup": "Branches;Fed;FetchBW;Frontend;PGO", 104 "MetricName": "IpTB" 105 }, 106 { 107 "BriefDescription": "Branch instructions per taken branch. ", 108 "MetricExpr": "BR_INST_RETIRED.ALL_BRANCHES / BR_INST_RETIRED.NEAR_TAKEN", 109 "MetricGroup": "Branches;Fed;PGO", 110 "MetricName": "BpTkBranch" 111 }, 112 { 113 "BriefDescription": "Instructions per Floating Point (FP) Operation (lower number means higher occurrence rate)", 114 "MetricExpr": "INST_RETIRED.ANY / ( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE + FP_ARITH_INST_RETIRED2.SCALAR_HALF ) + 2 * ( FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + FP_ARITH_INST_RETIRED2.COMPLEX_SCALAR_HALF ) + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * ( FP_ARITH_INST_RETIRED2.128B_PACKED_HALF + FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE ) + 16 * ( FP_ARITH_INST_RETIRED2.256B_PACKED_HALF + FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE ) + 32 * FP_ARITH_INST_RETIRED2.512B_PACKED_HALF + 4 * AMX_OPS_RETIRED.BF16 )", 115 "MetricGroup": "Flops;InsType", 116 "MetricName": "IpFLOP" 117 }, 118 { 119 "BriefDescription": "Instructions per FP Arithmetic instruction (lower number means higher occurrence rate)", 120 "MetricExpr": "INST_RETIRED.ANY / ( (FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE + FP_ARITH_INST_RETIRED2.SCALAR) + (FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE + FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE + FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE + FP_ARITH_INST_RETIRED2.VECTOR) )", 121 "MetricGroup": "Flops;InsType", 122 "MetricName": "IpArith", 123 "PublicDescription": "Instructions per FP Arithmetic instruction (lower number means higher occurrence rate). May undercount due to FMA double counting. Approximated prior to BDW." 124 }, 125 { 126 "BriefDescription": "Instructions per FP Arithmetic Scalar Single-Precision instruction (lower number means higher occurrence rate)", 127 "MetricExpr": "INST_RETIRED.ANY / FP_ARITH_INST_RETIRED.SCALAR_SINGLE", 128 "MetricGroup": "Flops;FpScalar;InsType", 129 "MetricName": "IpArith_Scalar_SP", 130 "PublicDescription": "Instructions per FP Arithmetic Scalar Single-Precision instruction (lower number means higher occurrence rate). May undercount due to FMA double counting." 131 }, 132 { 133 "BriefDescription": "Instructions per FP Arithmetic Scalar Double-Precision instruction (lower number means higher occurrence rate)", 134 "MetricExpr": "INST_RETIRED.ANY / FP_ARITH_INST_RETIRED.SCALAR_DOUBLE", 135 "MetricGroup": "Flops;FpScalar;InsType", 136 "MetricName": "IpArith_Scalar_DP", 137 "PublicDescription": "Instructions per FP Arithmetic Scalar Double-Precision instruction (lower number means higher occurrence rate). May undercount due to FMA double counting." 138 }, 139 { 140 "BriefDescription": "Instructions per FP Arithmetic AVX/SSE 128-bit instruction (lower number means higher occurrence rate)", 141 "MetricExpr": "INST_RETIRED.ANY / ( FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED2.128B_PACKED_HALF )", 142 "MetricGroup": "Flops;FpVector;InsType", 143 "MetricName": "IpArith_AVX128", 144 "PublicDescription": "Instructions per FP Arithmetic AVX/SSE 128-bit instruction (lower number means higher occurrence rate). May undercount due to FMA double counting." 145 }, 146 { 147 "BriefDescription": "Instructions per FP Arithmetic AVX* 256-bit instruction (lower number means higher occurrence rate)", 148 "MetricExpr": "INST_RETIRED.ANY / ( FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE + FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED2.256B_PACKED_HALF )", 149 "MetricGroup": "Flops;FpVector;InsType", 150 "MetricName": "IpArith_AVX256", 151 "PublicDescription": "Instructions per FP Arithmetic AVX* 256-bit instruction (lower number means higher occurrence rate). May undercount due to FMA double counting." 152 }, 153 { 154 "BriefDescription": "Instructions per FP Arithmetic AVX 512-bit instruction (lower number means higher occurrence rate)", 155 "MetricExpr": "INST_RETIRED.ANY / ( FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE + FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE + FP_ARITH_INST_RETIRED2.512B_PACKED_HALF )", 156 "MetricGroup": "Flops;FpVector;InsType", 157 "MetricName": "IpArith_AVX512", 158 "PublicDescription": "Instructions per FP Arithmetic AVX 512-bit instruction (lower number means higher occurrence rate). May undercount due to FMA double counting." 159 }, 160 { 161 "BriefDescription": "Instructions per FP Arithmetic AMX operation (lower number means higher occurrence rate)", 162 "MetricExpr": "INST_RETIRED.ANY / AMX_OPS_RETIRED.BF16", 163 "MetricGroup": "Flops;FpVector;InsType;Server", 164 "MetricName": "IpArith_AMX_F16", 165 "PublicDescription": "Instructions per FP Arithmetic AMX operation (lower number means higher occurrence rate). Operations factored per matrices' sizes of the AMX instructions." 166 }, 167 { 168 "BriefDescription": "Instructions per Integer Arithmetic AMX operation (lower number means higher occurrence rate)", 169 "MetricExpr": "INST_RETIRED.ANY / AMX_OPS_RETIRED.INT8", 170 "MetricGroup": "IntVector;InsType;Server", 171 "MetricName": "IpArith_AMX_Int8", 172 "PublicDescription": "Instructions per Integer Arithmetic AMX operation (lower number means higher occurrence rate). Operations factored per matrices' sizes of the AMX instructions." 173 }, 174 { 175 "BriefDescription": "Instructions per Software prefetch instruction (of any type: NTA/T0/T1/T2/Prefetch) (lower number means higher occurrence rate)", 176 "MetricExpr": "INST_RETIRED.ANY / cpu@SW_PREFETCH_ACCESS.T0\\,umask\\=0xF@", 177 "MetricGroup": "Prefetches", 178 "MetricName": "IpSWPF" 179 }, 180 { 181 "BriefDescription": "Total number of retired Instructions, Sample with: INST_RETIRED.PREC_DIST", 182 "MetricExpr": "INST_RETIRED.ANY", 183 "MetricGroup": "Summary;TmaL1", 184 "MetricName": "Instructions" 185 }, 186 { 187 "BriefDescription": "Estimated fraction of retirement-cycles dealing with repeat instructions", 188 "MetricExpr": "INST_RETIRED.REP_ITERATION / cpu@UOPS_RETIRED.SLOTS\\,cmask\\=1@", 189 "MetricGroup": "Pipeline;Ret", 190 "MetricName": "Strings_Cycles" 191 }, 192 { 193 "BriefDescription": "Instructions per a microcode Assist invocation. See Assists tree node for details (lower number means higher occurrence rate)", 194 "MetricExpr": "INST_RETIRED.ANY / cpu@ASSISTS.ANY\\,umask\\=0x1B@", 195 "MetricGroup": "Pipeline;Ret;Retire", 196 "MetricName": "IpAssist" 197 }, 198 { 199 "BriefDescription": "", 200 "MetricExpr": "UOPS_EXECUTED.THREAD / cpu@UOPS_EXECUTED.THREAD\\,cmask\\=1@", 201 "MetricGroup": "Cor;Pipeline;PortsUtil;SMT", 202 "MetricName": "Execute" 203 }, 204 { 205 "BriefDescription": "Average number of Uops issued by front-end when it issued something", 206 "MetricExpr": "UOPS_ISSUED.ANY / cpu@UOPS_ISSUED.ANY\\,cmask\\=1@", 207 "MetricGroup": "Fed;FetchBW", 208 "MetricName": "Fetch_UpC" 209 }, 210 { 211 "BriefDescription": "Fraction of Uops delivered by the DSB (aka Decoded ICache; or Uop Cache)", 212 "MetricExpr": "IDQ.DSB_UOPS / (IDQ.DSB_UOPS + IDQ.MITE_UOPS + IDQ.MS_UOPS)", 213 "MetricGroup": "DSB;Fed;FetchBW", 214 "MetricName": "DSB_Coverage" 215 }, 216 { 217 "BriefDescription": "Average number of cycles of a switch from the DSB fetch-unit to MITE fetch unit - see DSB_Switches tree node for details.", 218 "MetricExpr": "DSB2MITE_SWITCHES.PENALTY_CYCLES / cpu@DSB2MITE_SWITCHES.PENALTY_CYCLES\\,cmask\\=1\\,edge@", 219 "MetricGroup": "DSBmiss", 220 "MetricName": "DSB_Switch_Cost" 221 }, 222 { 223 "BriefDescription": "Number of Instructions per non-speculative DSB miss (lower number means higher occurrence rate)", 224 "MetricExpr": "INST_RETIRED.ANY / FRONTEND_RETIRED.ANY_DSB_MISS", 225 "MetricGroup": "DSBmiss;Fed", 226 "MetricName": "IpDSB_Miss_Ret" 227 }, 228 { 229 "BriefDescription": "Number of Instructions per non-speculative Branch Misprediction (JEClear) (lower number means higher occurrence rate)", 230 "MetricExpr": "INST_RETIRED.ANY / BR_MISP_RETIRED.ALL_BRANCHES", 231 "MetricGroup": "Bad;BadSpec;BrMispredicts", 232 "MetricName": "IpMispredict" 233 }, 234 { 235 "BriefDescription": "Fraction of branches that are non-taken conditionals", 236 "MetricExpr": "BR_INST_RETIRED.COND_NTAKEN / BR_INST_RETIRED.ALL_BRANCHES", 237 "MetricGroup": "Bad;Branches;CodeGen;PGO", 238 "MetricName": "Cond_NT" 239 }, 240 { 241 "BriefDescription": "Fraction of branches that are taken conditionals", 242 "MetricExpr": "BR_INST_RETIRED.COND_TAKEN / BR_INST_RETIRED.ALL_BRANCHES", 243 "MetricGroup": "Bad;Branches;CodeGen;PGO", 244 "MetricName": "Cond_TK" 245 }, 246 { 247 "BriefDescription": "Fraction of branches that are CALL or RET", 248 "MetricExpr": "( BR_INST_RETIRED.NEAR_CALL + BR_INST_RETIRED.NEAR_RETURN ) / BR_INST_RETIRED.ALL_BRANCHES", 249 "MetricGroup": "Bad;Branches", 250 "MetricName": "CallRet" 251 }, 252 { 253 "BriefDescription": "Fraction of branches that are unconditional (direct or indirect) jumps", 254 "MetricExpr": "(BR_INST_RETIRED.NEAR_TAKEN - BR_INST_RETIRED.COND_TAKEN - 2 * BR_INST_RETIRED.NEAR_CALL) / BR_INST_RETIRED.ALL_BRANCHES", 255 "MetricGroup": "Bad;Branches", 256 "MetricName": "Jump" 257 }, 258 { 259 "BriefDescription": "Fraction of branches of other types (not individually covered by other metrics in Info.Branches group)", 260 "MetricExpr": "1 - ( (BR_INST_RETIRED.COND_NTAKEN / BR_INST_RETIRED.ALL_BRANCHES) + (BR_INST_RETIRED.COND_TAKEN / BR_INST_RETIRED.ALL_BRANCHES) + (( BR_INST_RETIRED.NEAR_CALL + BR_INST_RETIRED.NEAR_RETURN ) / BR_INST_RETIRED.ALL_BRANCHES) + ((BR_INST_RETIRED.NEAR_TAKEN - BR_INST_RETIRED.COND_TAKEN - 2 * BR_INST_RETIRED.NEAR_CALL) / BR_INST_RETIRED.ALL_BRANCHES) )", 261 "MetricGroup": "Bad;Branches", 262 "MetricName": "Other_Branches" 263 }, 264 { 265 "BriefDescription": "Actual Average Latency for L1 data-cache miss demand load operations (in core cycles)", 266 "MetricExpr": "L1D_PEND_MISS.PENDING / MEM_LOAD_COMPLETED.L1_MISS_ANY", 267 "MetricGroup": "Mem;MemoryBound;MemoryLat", 268 "MetricName": "Load_Miss_Real_Latency" 269 }, 270 { 271 "BriefDescription": "Memory-Level-Parallelism (average number of L1 miss demand load when there is at least one such miss. Per-Logical Processor)", 272 "MetricExpr": "L1D_PEND_MISS.PENDING / L1D_PEND_MISS.PENDING_CYCLES", 273 "MetricGroup": "Mem;MemoryBound;MemoryBW", 274 "MetricName": "MLP" 275 }, 276 { 277 "BriefDescription": "L1 cache true misses per kilo instruction for retired demand loads", 278 "MetricExpr": "1000 * MEM_LOAD_RETIRED.L1_MISS / INST_RETIRED.ANY", 279 "MetricGroup": "Mem;CacheMisses", 280 "MetricName": "L1MPKI" 281 }, 282 { 283 "BriefDescription": "L1 cache true misses per kilo instruction for all demand loads (including speculative)", 284 "MetricExpr": "1000 * L2_RQSTS.ALL_DEMAND_DATA_RD / INST_RETIRED.ANY", 285 "MetricGroup": "Mem;CacheMisses", 286 "MetricName": "L1MPKI_Load" 287 }, 288 { 289 "BriefDescription": "L2 cache true misses per kilo instruction for retired demand loads", 290 "MetricExpr": "1000 * MEM_LOAD_RETIRED.L2_MISS / INST_RETIRED.ANY", 291 "MetricGroup": "Mem;Backend;CacheMisses", 292 "MetricName": "L2MPKI" 293 }, 294 { 295 "BriefDescription": "L2 cache ([RKL+] true) misses per kilo instruction for all request types (including speculative)", 296 "MetricExpr": "1000 * L2_RQSTS.MISS / INST_RETIRED.ANY", 297 "MetricGroup": "Mem;CacheMisses;Offcore", 298 "MetricName": "L2MPKI_All" 299 }, 300 { 301 "BriefDescription": "L2 cache ([RKL+] true) misses per kilo instruction for all demand loads (including speculative)", 302 "MetricExpr": "1000 * L2_RQSTS.DEMAND_DATA_RD_MISS / INST_RETIRED.ANY", 303 "MetricGroup": "Mem;CacheMisses", 304 "MetricName": "L2MPKI_Load" 305 }, 306 { 307 "BriefDescription": "L2 cache hits per kilo instruction for all request types (including speculative)", 308 "MetricExpr": "1000 * ( L2_RQSTS.REFERENCES - L2_RQSTS.MISS ) / INST_RETIRED.ANY", 309 "MetricGroup": "Mem;CacheMisses", 310 "MetricName": "L2HPKI_All" 311 }, 312 { 313 "BriefDescription": "L2 cache hits per kilo instruction for all demand loads (including speculative)", 314 "MetricExpr": "1000 * L2_RQSTS.DEMAND_DATA_RD_HIT / INST_RETIRED.ANY", 315 "MetricGroup": "Mem;CacheMisses", 316 "MetricName": "L2HPKI_Load" 317 }, 318 { 319 "BriefDescription": "L3 cache true misses per kilo instruction for retired demand loads", 320 "MetricExpr": "1000 * MEM_LOAD_RETIRED.L3_MISS / INST_RETIRED.ANY", 321 "MetricGroup": "Mem;CacheMisses", 322 "MetricName": "L3MPKI" 323 }, 324 { 325 "BriefDescription": "Fill Buffer (FB) hits per kilo instructions for retired demand loads (L1D misses that merge into ongoing miss-handling entries)", 326 "MetricExpr": "1000 * MEM_LOAD_RETIRED.FB_HIT / INST_RETIRED.ANY", 327 "MetricGroup": "Mem;CacheMisses", 328 "MetricName": "FB_HPKI" 329 }, 330 { 331 "BriefDescription": "Utilization of the core's Page Walker(s) serving STLB misses triggered by instruction/Load/Store accesses", 332 "MetricConstraint": "NO_NMI_WATCHDOG", 333 "MetricExpr": "( ITLB_MISSES.WALK_PENDING + DTLB_LOAD_MISSES.WALK_PENDING + DTLB_STORE_MISSES.WALK_PENDING ) / ( 4 * CPU_CLK_UNHALTED.DISTRIBUTED )", 334 "MetricGroup": "Mem;MemoryTLB", 335 "MetricName": "Page_Walks_Utilization" 336 }, 337 { 338 "BriefDescription": "Average per-core data fill bandwidth to the L1 data cache [GB / sec]", 339 "MetricExpr": "64 * L1D.REPLACEMENT / 1000000000 / duration_time", 340 "MetricGroup": "Mem;MemoryBW", 341 "MetricName": "L1D_Cache_Fill_BW" 342 }, 343 { 344 "BriefDescription": "Average per-core data fill bandwidth to the L2 cache [GB / sec]", 345 "MetricExpr": "64 * L2_LINES_IN.ALL / 1000000000 / duration_time", 346 "MetricGroup": "Mem;MemoryBW", 347 "MetricName": "L2_Cache_Fill_BW" 348 }, 349 { 350 "BriefDescription": "Average per-core data fill bandwidth to the L3 cache [GB / sec]", 351 "MetricExpr": "64 * LONGEST_LAT_CACHE.MISS / 1000000000 / duration_time", 352 "MetricGroup": "Mem;MemoryBW", 353 "MetricName": "L3_Cache_Fill_BW" 354 }, 355 { 356 "BriefDescription": "Average per-core data access bandwidth to the L3 cache [GB / sec]", 357 "MetricExpr": "64 * OFFCORE_REQUESTS.ALL_REQUESTS / 1000000000 / duration_time", 358 "MetricGroup": "Mem;MemoryBW;Offcore", 359 "MetricName": "L3_Cache_Access_BW" 360 }, 361 { 362 "BriefDescription": "Rate of silent evictions from the L2 cache per Kilo instruction where the evicted lines are dropped (no writeback to L3 or memory)", 363 "MetricExpr": "1000 * L2_LINES_OUT.SILENT / INST_RETIRED.ANY", 364 "MetricGroup": "L2Evicts;Mem;Server", 365 "MetricName": "L2_Evictions_Silent_PKI" 366 }, 367 { 368 "BriefDescription": "Rate of non silent evictions from the L2 cache per Kilo instruction", 369 "MetricExpr": "1000 * L2_LINES_OUT.NON_SILENT / INST_RETIRED.ANY", 370 "MetricGroup": "L2Evicts;Mem;Server", 371 "MetricName": "L2_Evictions_NonSilent_PKI" 372 }, 373 { 374 "BriefDescription": "Average per-thread data fill bandwidth to the L1 data cache [GB / sec]", 375 "MetricExpr": "(64 * L1D.REPLACEMENT / 1000000000 / duration_time)", 376 "MetricGroup": "Mem;MemoryBW", 377 "MetricName": "L1D_Cache_Fill_BW_1T" 378 }, 379 { 380 "BriefDescription": "Average per-thread data fill bandwidth to the L2 cache [GB / sec]", 381 "MetricExpr": "(64 * L2_LINES_IN.ALL / 1000000000 / duration_time)", 382 "MetricGroup": "Mem;MemoryBW", 383 "MetricName": "L2_Cache_Fill_BW_1T" 384 }, 385 { 386 "BriefDescription": "Average per-thread data fill bandwidth to the L3 cache [GB / sec]", 387 "MetricExpr": "(64 * LONGEST_LAT_CACHE.MISS / 1000000000 / duration_time)", 388 "MetricGroup": "Mem;MemoryBW", 389 "MetricName": "L3_Cache_Fill_BW_1T" 390 }, 391 { 392 "BriefDescription": "Average per-thread data access bandwidth to the L3 cache [GB / sec]", 393 "MetricExpr": "(64 * OFFCORE_REQUESTS.ALL_REQUESTS / 1000000000 / duration_time)", 394 "MetricGroup": "Mem;MemoryBW;Offcore", 395 "MetricName": "L3_Cache_Access_BW_1T" 396 }, 397 { 398 "BriefDescription": "Average CPU Utilization", 399 "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / msr@tsc@", 400 "MetricGroup": "HPC;Summary", 401 "MetricName": "CPU_Utilization" 402 }, 403 { 404 "BriefDescription": "Measured Average Frequency for unhalted processors [GHz]", 405 "MetricExpr": "(CPU_CLK_UNHALTED.THREAD / CPU_CLK_UNHALTED.REF_TSC) * msr@tsc@ / 1000000000 / duration_time", 406 "MetricGroup": "Summary;Power", 407 "MetricName": "Average_Frequency" 408 }, 409 { 410 "BriefDescription": "Giga Floating Point Operations Per Second", 411 "MetricExpr": "( ( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE + FP_ARITH_INST_RETIRED2.SCALAR_HALF ) + 2 * ( FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + FP_ARITH_INST_RETIRED2.COMPLEX_SCALAR_HALF ) + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * ( FP_ARITH_INST_RETIRED2.128B_PACKED_HALF + FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE ) + 16 * ( FP_ARITH_INST_RETIRED2.256B_PACKED_HALF + FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE ) + 32 * FP_ARITH_INST_RETIRED2.512B_PACKED_HALF + 4 * AMX_OPS_RETIRED.BF16 ) / 1000000000 ) / duration_time", 412 "MetricGroup": "Cor;Flops;HPC", 413 "MetricName": "GFLOPs", 414 "PublicDescription": "Giga Floating Point Operations Per Second. Aggregate across all supported options of: FP precisions, scalar and vector instructions, vector-width and AMX engine." 415 }, 416 { 417 "BriefDescription": "Tera Integer (matrix) Operations Per Second", 418 "MetricExpr": "( 8 * AMX_OPS_RETIRED.INT8 / 1000000000000 ) / duration_time", 419 "MetricGroup": "Cor;HPC;IntVector;Server", 420 "MetricName": "TIOPS" 421 }, 422 { 423 "BriefDescription": "Average Frequency Utilization relative nominal frequency", 424 "MetricExpr": "CPU_CLK_UNHALTED.THREAD / CPU_CLK_UNHALTED.REF_TSC", 425 "MetricGroup": "Power", 426 "MetricName": "Turbo_Utilization" 427 }, 428 { 429 "BriefDescription": "Fraction of cycles where both hardware Logical Processors were active", 430 "MetricExpr": "1 - CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_DISTRIBUTED if #SMT_on else 0", 431 "MetricGroup": "SMT", 432 "MetricName": "SMT_2T_Utilization" 433 }, 434 { 435 "BriefDescription": "Fraction of cycles spent in the Operating System (OS) Kernel mode", 436 "MetricExpr": "CPU_CLK_UNHALTED.THREAD_P:k / CPU_CLK_UNHALTED.THREAD", 437 "MetricGroup": "OS", 438 "MetricName": "Kernel_Utilization" 439 }, 440 { 441 "BriefDescription": "Cycles Per Instruction for the Operating System (OS) Kernel mode", 442 "MetricExpr": "CPU_CLK_UNHALTED.THREAD_P:k / INST_RETIRED.ANY_P:k", 443 "MetricGroup": "OS", 444 "MetricName": "Kernel_CPI" 445 }, 446 { 447 "BriefDescription": "Average external Memory Bandwidth Use for reads and writes [GB / sec]", 448 "MetricExpr": "( 64 * ( uncore_imc@cas_count_read@ + uncore_imc@cas_count_write@ ) / 1000000000 ) / duration_time", 449 "MetricGroup": "HPC;Mem;MemoryBW;SoC", 450 "MetricName": "DRAM_BW_Use" 451 }, 452 { 453 "BriefDescription": "Average latency of data read request to external memory (in nanoseconds). Accounts for demand loads and L1/L2 prefetches", 454 "MetricExpr": "1000000000 * ( UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD / UNC_CHA_TOR_INSERTS.IA_MISS_DRD ) / ( uncore_cha_0@event\\=0x1@ / duration_time )", 455 "MetricGroup": "Mem;MemoryLat;SoC", 456 "MetricName": "MEM_Read_Latency" 457 }, 458 { 459 "BriefDescription": "Average number of parallel data read requests to external memory. Accounts for demand loads and L1/L2 prefetches", 460 "MetricExpr": "UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD / cha@UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD\\,thresh\\=1@", 461 "MetricGroup": "Mem;MemoryBW;SoC", 462 "MetricName": "MEM_Parallel_Reads" 463 }, 464 { 465 "BriefDescription": "Average latency of data read request to external 3D X-Point memory [in nanoseconds]. Accounts for demand loads and L1/L2 data-read prefetches", 466 "MetricExpr": "( 1000000000 * ( UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PMM / UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PMM ) / uncore_cha_0@event\\=0x1@ )", 467 "MetricGroup": "Mem;MemoryLat;SoC;Server", 468 "MetricName": "MEM_PMM_Read_Latency" 469 }, 470 { 471 "BriefDescription": "Average latency of data read request to external DRAM memory [in nanoseconds]. Accounts for demand loads and L1/L2 data-read prefetches", 472 "MetricExpr": " 1000000000 * ( UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_DDR / UNC_CHA_TOR_INSERTS.IA_MISS_DRD_DDR ) / uncore_cha_0@event\\=0x1@", 473 "MetricGroup": "Mem;MemoryLat;SoC;Server", 474 "MetricName": "MEM_DRAM_Read_Latency" 475 }, 476 { 477 "BriefDescription": "Average 3DXP Memory Bandwidth Use for reads [GB / sec]", 478 "MetricExpr": "( ( 64 * UNC_M_PMM_RPQ_INSERTS / 1000000000 ) / duration_time )", 479 "MetricGroup": "Mem;MemoryBW;SoC;Server", 480 "MetricName": "PMM_Read_BW" 481 }, 482 { 483 "BriefDescription": "Average 3DXP Memory Bandwidth Use for Writes [GB / sec]", 484 "MetricExpr": "( ( 64 * UNC_M_PMM_WPQ_INSERTS / 1000000000 ) / duration_time )", 485 "MetricGroup": "Mem;MemoryBW;SoC;Server", 486 "MetricName": "PMM_Write_BW" 487 }, 488 { 489 "BriefDescription": "Average IO (network or disk) Bandwidth Use for Writes [GB / sec]", 490 "MetricExpr": "UNC_CHA_TOR_INSERTS.IO_PCIRDCUR * 64 / 1000000000 / duration_time", 491 "MetricGroup": "IoBW;Mem;SoC;Server", 492 "MetricName": "IO_Write_BW" 493 }, 494 { 495 "BriefDescription": "Socket actual clocks when any core is active on that socket", 496 "MetricExpr": "uncore_cha_0@event\\=0x1@", 497 "MetricGroup": "SoC", 498 "MetricName": "Socket_CLKS" 499 }, 500 { 501 "BriefDescription": "Instructions per Far Branch ( Far Branches apply upon transition from application to operating system, handling interrupts, exceptions) [lower number means higher occurrence rate]", 502 "MetricExpr": "INST_RETIRED.ANY / BR_INST_RETIRED.FAR_BRANCH:u", 503 "MetricGroup": "Branches;OS", 504 "MetricName": "IpFarBranch" 505 }, 506 { 507 "BriefDescription": "C1 residency percent per core", 508 "MetricExpr": "(cstate_core@c1\\-residency@ / msr@tsc@) * 100", 509 "MetricGroup": "Power", 510 "MetricName": "C1_Core_Residency" 511 }, 512 { 513 "BriefDescription": "C6 residency percent per core", 514 "MetricExpr": "(cstate_core@c6\\-residency@ / msr@tsc@) * 100", 515 "MetricGroup": "Power", 516 "MetricName": "C6_Core_Residency" 517 }, 518 { 519 "BriefDescription": "C2 residency percent per package", 520 "MetricExpr": "(cstate_pkg@c2\\-residency@ / msr@tsc@) * 100", 521 "MetricGroup": "Power", 522 "MetricName": "C2_Pkg_Residency" 523 }, 524 { 525 "BriefDescription": "C6 residency percent per package", 526 "MetricExpr": "(cstate_pkg@c6\\-residency@ / msr@tsc@) * 100", 527 "MetricGroup": "Power", 528 "MetricName": "C6_Pkg_Residency" 529 } 530]