cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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pmu-events.h (1362B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2#ifndef PMU_EVENTS_H
      3#define PMU_EVENTS_H
      4
      5enum aggr_mode_class {
      6	PerChip = 1,
      7	PerCore
      8};
      9
     10/*
     11 * Describe each PMU event. Each CPU has a table of PMU events.
     12 */
     13struct pmu_event {
     14	const char *name;
     15	const char *compat;
     16	const char *event;
     17	const char *desc;
     18	const char *topic;
     19	const char *long_desc;
     20	const char *pmu;
     21	const char *unit;
     22	const char *perpkg;
     23	const char *aggr_mode;
     24	const char *metric_expr;
     25	const char *metric_name;
     26	const char *metric_group;
     27	const char *deprecated;
     28	const char *metric_constraint;
     29};
     30
     31/*
     32 *
     33 * Map a CPU to its table of PMU events. The CPU is identified by the
     34 * cpuid field, which is an arch-specific identifier for the CPU.
     35 * The identifier specified in tools/perf/pmu-events/arch/xxx/mapfile
     36 * must match the get_cpuid_str() in tools/perf/arch/xxx/util/header.c)
     37 *
     38 * The  cpuid can contain any character other than the comma.
     39 */
     40struct pmu_events_map {
     41	const char *cpuid;
     42	const char *version;
     43	const char *type;		/* core, uncore etc */
     44	const struct pmu_event *table;
     45};
     46
     47struct pmu_sys_events {
     48	const char *name;
     49	const struct pmu_event *table;
     50};
     51
     52/*
     53 * Global table mapping each known CPU for the architecture to its
     54 * table of PMU events.
     55 */
     56extern const struct pmu_events_map pmu_events_map[];
     57extern const struct pmu_sys_events pmu_sys_event_tables[];
     58
     59#endif