cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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intel-pt-pkt-decoder.h (2051B)

      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 * intel_pt_pkt_decoder.h: Intel Processor Trace support
      4 * Copyright (c) 2013-2014, Intel Corporation.
      5 */
      6
      7#ifndef INCLUDE__INTEL_PT_PKT_DECODER_H__
      8#define INCLUDE__INTEL_PT_PKT_DECODER_H__
      9
     10#include <stddef.h>
     11#include <stdint.h>
     12
     13#define INTEL_PT_PKT_DESC_MAX	256
     14
     15#define INTEL_PT_NEED_MORE_BYTES	-1
     16#define INTEL_PT_BAD_PACKET		-2
     17
     18#define INTEL_PT_PSB_STR		"\002\202\002\202\002\202\002\202" \
     19					"\002\202\002\202\002\202\002\202"
     20#define INTEL_PT_PSB_LEN		16
     21
     22#define INTEL_PT_PKT_MAX_SZ		16
     23
     24#define INTEL_PT_VMX_NR_FLAG		1
     25
     26enum intel_pt_pkt_type {
     27	INTEL_PT_BAD,
     28	INTEL_PT_PAD,
     29	INTEL_PT_TNT,
     30	INTEL_PT_TIP_PGD,
     31	INTEL_PT_TIP_PGE,
     32	INTEL_PT_TSC,
     33	INTEL_PT_TMA,
     34	INTEL_PT_MODE_EXEC,
     35	INTEL_PT_MODE_TSX,
     36	INTEL_PT_MTC,
     37	INTEL_PT_TIP,
     38	INTEL_PT_FUP,
     39	INTEL_PT_CYC,
     40	INTEL_PT_VMCS,
     41	INTEL_PT_PSB,
     42	INTEL_PT_PSBEND,
     43	INTEL_PT_CBR,
     44	INTEL_PT_TRACESTOP,
     45	INTEL_PT_PIP,
     46	INTEL_PT_OVF,
     47	INTEL_PT_MNT,
     48	INTEL_PT_PTWRITE,
     49	INTEL_PT_PTWRITE_IP,
     50	INTEL_PT_EXSTOP,
     51	INTEL_PT_EXSTOP_IP,
     52	INTEL_PT_MWAIT,
     53	INTEL_PT_PWRE,
     54	INTEL_PT_PWRX,
     55	INTEL_PT_BBP,
     56	INTEL_PT_BIP,
     57	INTEL_PT_BEP,
     58	INTEL_PT_BEP_IP,
     59	INTEL_PT_CFE,
     60	INTEL_PT_CFE_IP,
     61	INTEL_PT_EVD,
     62};
     63
     64struct intel_pt_pkt {
     65	enum intel_pt_pkt_type	type;
     66	int			count;
     67	uint64_t		payload;
     68};
     69
     70/*
     71 * Decoding of BIP packets conflicts with single-byte TNT packets. Since BIP
     72 * packets only occur in the context of a block (i.e. between BBP and BEP), that
     73 * context must be recorded and passed to the packet decoder.
     74 */
     75enum intel_pt_pkt_ctx {
     76	INTEL_PT_NO_CTX,	/* BIP packets are invalid */
     77	INTEL_PT_BLK_4_CTX,	/* 4-byte BIP packets */
     78	INTEL_PT_BLK_8_CTX,	/* 8-byte BIP packets */
     79};
     80
     81const char *intel_pt_pkt_name(enum intel_pt_pkt_type);
     82
     83int intel_pt_get_packet(const unsigned char *buf, size_t len,
     84			struct intel_pt_pkt *packet,
     85			enum intel_pt_pkt_ctx *ctx);
     86
     87void intel_pt_upd_pkt_ctx(const struct intel_pt_pkt *packet,
     88			  enum intel_pt_pkt_ctx *ctx);
     89
     90int intel_pt_pkt_desc(const struct intel_pt_pkt *packet, char *buf, size_t len);
     91
     92#endif