cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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xapic_state_test.c (3897B)

      1// SPDX-License-Identifier: GPL-2.0-only
      2#define _GNU_SOURCE /* for program_invocation_short_name */
      3#include <fcntl.h>
      4#include <stdio.h>
      5#include <stdlib.h>
      6#include <string.h>
      7#include <sys/ioctl.h>
      8
      9#include "apic.h"
     10#include "kvm_util.h"
     11#include "processor.h"
     12#include "test_util.h"
     13
     14struct kvm_vcpu {
     15	uint32_t id;
     16	bool is_x2apic;
     17};
     18
     19static void xapic_guest_code(void)
     20{
     21	asm volatile("cli");
     22
     23	xapic_enable();
     24
     25	while (1) {
     26		uint64_t val = (u64)xapic_read_reg(APIC_IRR) |
     27			       (u64)xapic_read_reg(APIC_IRR + 0x10) << 32;
     28
     29		xapic_write_reg(APIC_ICR2, val >> 32);
     30		xapic_write_reg(APIC_ICR, val);
     31		GUEST_SYNC(val);
     32	}
     33}
     34
     35static void x2apic_guest_code(void)
     36{
     37	asm volatile("cli");
     38
     39	x2apic_enable();
     40
     41	do {
     42		uint64_t val = x2apic_read_reg(APIC_IRR) |
     43			       x2apic_read_reg(APIC_IRR + 0x10) << 32;
     44
     45		x2apic_write_reg(APIC_ICR, val);
     46		GUEST_SYNC(val);
     47	} while (1);
     48}
     49
     50static void ____test_icr(struct kvm_vm *vm, struct kvm_vcpu *vcpu, uint64_t val)
     51{
     52	struct kvm_lapic_state xapic;
     53	struct ucall uc;
     54	uint64_t icr;
     55
     56	/*
     57	 * Tell the guest what ICR value to write.  Use the IRR to pass info,
     58	 * all bits are valid and should not be modified by KVM (ignoring the
     59	 * fact that vectors 0-15 are technically illegal).
     60	 */
     61	vcpu_ioctl(vm, vcpu->id, KVM_GET_LAPIC, &xapic);
     62	*((u32 *)&xapic.regs[APIC_IRR]) = val;
     63	*((u32 *)&xapic.regs[APIC_IRR + 0x10]) = val >> 32;
     64	vcpu_ioctl(vm, vcpu->id, KVM_SET_LAPIC, &xapic);
     65
     66	vcpu_run(vm, vcpu->id);
     67	ASSERT_EQ(get_ucall(vm, vcpu->id, &uc), UCALL_SYNC);
     68	ASSERT_EQ(uc.args[1], val);
     69
     70	vcpu_ioctl(vm, vcpu->id, KVM_GET_LAPIC, &xapic);
     71	icr = (u64)(*((u32 *)&xapic.regs[APIC_ICR])) |
     72	      (u64)(*((u32 *)&xapic.regs[APIC_ICR2])) << 32;
     73	if (!vcpu->is_x2apic)
     74		val &= (-1u | (0xffull << (32 + 24)));
     75	ASSERT_EQ(icr, val & ~APIC_ICR_BUSY);
     76}
     77
     78static void __test_icr(struct kvm_vm *vm, struct kvm_vcpu *vcpu, uint64_t val)
     79{
     80	____test_icr(vm, vcpu, val | APIC_ICR_BUSY);
     81	____test_icr(vm, vcpu, val & ~(u64)APIC_ICR_BUSY);
     82}
     83
     84static void test_icr(struct kvm_vm *vm, struct kvm_vcpu *vcpu)
     85{
     86	uint64_t icr, i, j;
     87
     88	icr = APIC_DEST_SELF | APIC_INT_ASSERT | APIC_DM_FIXED;
     89	for (i = 0; i <= 0xff; i++)
     90		__test_icr(vm, vcpu, icr | i);
     91
     92	icr = APIC_INT_ASSERT | APIC_DM_FIXED;
     93	for (i = 0; i <= 0xff; i++)
     94		__test_icr(vm, vcpu, icr | i);
     95
     96	/*
     97	 * Send all flavors of IPIs to non-existent vCPUs.  TODO: use number of
     98	 * vCPUs, not vcpu.id + 1.  Arbitrarily use vector 0xff.
     99	 */
    100	icr = APIC_INT_ASSERT | 0xff;
    101	for (i = vcpu->id + 1; i < 0xff; i++) {
    102		for (j = 0; j < 8; j++)
    103			__test_icr(vm, vcpu, i << (32 + 24) | APIC_INT_ASSERT | (j << 8));
    104	}
    105
    106	/* And again with a shorthand destination for all types of IPIs. */
    107	icr = APIC_DEST_ALLBUT | APIC_INT_ASSERT;
    108	for (i = 0; i < 8; i++)
    109		__test_icr(vm, vcpu, icr | (i << 8));
    110
    111	/* And a few garbage value, just make sure it's an IRQ (blocked). */
    112	__test_icr(vm, vcpu, 0xa5a5a5a5a5a5a5a5 & ~APIC_DM_FIXED_MASK);
    113	__test_icr(vm, vcpu, 0x5a5a5a5a5a5a5a5a & ~APIC_DM_FIXED_MASK);
    114	__test_icr(vm, vcpu, -1ull & ~APIC_DM_FIXED_MASK);
    115}
    116
    117int main(int argc, char *argv[])
    118{
    119	struct kvm_vcpu vcpu = {
    120		.id = 0,
    121		.is_x2apic = true,
    122	};
    123	struct kvm_cpuid2 *cpuid;
    124	struct kvm_vm *vm;
    125	int i;
    126
    127	vm = vm_create_default(vcpu.id, 0, x2apic_guest_code);
    128	test_icr(vm, &vcpu);
    129	kvm_vm_free(vm);
    130
    131	/*
    132	 * Use a second VM for the xAPIC test so that x2APIC can be hidden from
    133	 * the guest in order to test AVIC.  KVM disallows changing CPUID after
    134	 * KVM_RUN and AVIC is disabled if _any_ vCPU is allowed to use x2APIC.
    135	 */
    136	vm = vm_create_default(vcpu.id, 0, xapic_guest_code);
    137	vcpu.is_x2apic = false;
    138
    139	cpuid = vcpu_get_cpuid(vm, vcpu.id);
    140	for (i = 0; i < cpuid->nent; i++) {
    141		if (cpuid->entries[i].function == 1)
    142			break;
    143	}
    144	cpuid->entries[i].ecx &= ~BIT(21);
    145	vcpu_set_cpuid(vm, vcpu.id, cpuid);
    146
    147	virt_pg_map(vm, APIC_DEFAULT_GPA, APIC_DEFAULT_GPA);
    148	test_icr(vm, &vcpu);
    149	kvm_vm_free(vm);
    150}