cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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utils.h (3584B)


      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 * Copyright 2013, Michael Ellerman, IBM Corp.
      4 */
      5
      6#ifndef _SELFTESTS_POWERPC_UTILS_H
      7#define _SELFTESTS_POWERPC_UTILS_H
      8
      9#define __cacheline_aligned __attribute__((aligned(128)))
     10
     11#include <stdint.h>
     12#include <stdbool.h>
     13#include <linux/auxvec.h>
     14#include <linux/perf_event.h>
     15#include <asm/cputable.h>
     16#include "reg.h"
     17
     18/* Avoid headaches with PRI?64 - just use %ll? always */
     19typedef unsigned long long u64;
     20typedef   signed long long s64;
     21
     22/* Just for familiarity */
     23typedef uint32_t u32;
     24typedef uint16_t u16;
     25typedef uint8_t u8;
     26
     27void test_harness_set_timeout(uint64_t time);
     28int test_harness(int (test_function)(void), char *name);
     29
     30int read_auxv(char *buf, ssize_t buf_size);
     31void *find_auxv_entry(int type, char *auxv);
     32void *get_auxv_entry(int type);
     33
     34int pick_online_cpu(void);
     35
     36int read_debugfs_file(char *debugfs_file, int *result);
     37int write_debugfs_file(char *debugfs_file, int result);
     38int read_sysfs_file(char *debugfs_file, char *result, size_t result_size);
     39int perf_event_open_counter(unsigned int type,
     40			    unsigned long config, int group_fd);
     41int perf_event_enable(int fd);
     42int perf_event_disable(int fd);
     43int perf_event_reset(int fd);
     44
     45struct perf_event_read {
     46	__u64 nr;
     47	__u64 l1d_misses;
     48};
     49
     50#if !defined(__GLIBC_PREREQ) || !__GLIBC_PREREQ(2, 30)
     51#include <unistd.h>
     52#include <sys/syscall.h>
     53
     54static inline pid_t gettid(void)
     55{
     56	return syscall(SYS_gettid);
     57}
     58#endif
     59
     60static inline bool have_hwcap(unsigned long ftr)
     61{
     62	return ((unsigned long)get_auxv_entry(AT_HWCAP) & ftr) == ftr;
     63}
     64
     65#ifdef AT_HWCAP2
     66static inline bool have_hwcap2(unsigned long ftr2)
     67{
     68	return ((unsigned long)get_auxv_entry(AT_HWCAP2) & ftr2) == ftr2;
     69}
     70#else
     71static inline bool have_hwcap2(unsigned long ftr2)
     72{
     73	return false;
     74}
     75#endif
     76
     77bool is_ppc64le(void);
     78int using_hash_mmu(bool *using_hash);
     79
     80/* Yes, this is evil */
     81#define FAIL_IF(x)						\
     82do {								\
     83	if ((x)) {						\
     84		fprintf(stderr,					\
     85		"[FAIL] Test FAILED on line %d\n", __LINE__);	\
     86		return 1;					\
     87	}							\
     88} while (0)
     89
     90#define FAIL_IF_EXIT(x)						\
     91do {								\
     92	if ((x)) {						\
     93		fprintf(stderr,					\
     94		"[FAIL] Test FAILED on line %d\n", __LINE__);	\
     95		_exit(1);					\
     96	}							\
     97} while (0)
     98
     99/* The test harness uses this, yes it's gross */
    100#define MAGIC_SKIP_RETURN_VALUE	99
    101
    102#define SKIP_IF(x)						\
    103do {								\
    104	if ((x)) {						\
    105		fprintf(stderr,					\
    106		"[SKIP] Test skipped on line %d\n", __LINE__);	\
    107		return MAGIC_SKIP_RETURN_VALUE;			\
    108	}							\
    109} while (0)
    110
    111#define SKIP_IF_MSG(x, msg)					\
    112do {								\
    113	if ((x)) {						\
    114		fprintf(stderr,					\
    115		"[SKIP] Test skipped on line %d: %s\n",		\
    116		 __LINE__, msg);				\
    117		return MAGIC_SKIP_RETURN_VALUE;			\
    118	}							\
    119} while (0)
    120
    121#define _str(s) #s
    122#define str(s) _str(s)
    123
    124#define sigsafe_err(msg)	({ \
    125		ssize_t nbytes __attribute__((unused)); \
    126		nbytes = write(STDERR_FILENO, msg, strlen(msg)); })
    127
    128/* POWER9 feature */
    129#ifndef PPC_FEATURE2_ARCH_3_00
    130#define PPC_FEATURE2_ARCH_3_00 0x00800000
    131#endif
    132
    133/* POWER10 feature */
    134#ifndef PPC_FEATURE2_ARCH_3_1
    135#define PPC_FEATURE2_ARCH_3_1 0x00040000
    136#endif
    137
    138/* POWER10 features */
    139#ifndef PPC_FEATURE2_MMA
    140#define PPC_FEATURE2_MMA 0x00020000
    141#endif
    142
    143#if defined(__powerpc64__)
    144#define UCONTEXT_NIA(UC)	(UC)->uc_mcontext.gp_regs[PT_NIP]
    145#define UCONTEXT_MSR(UC)	(UC)->uc_mcontext.gp_regs[PT_MSR]
    146#elif defined(__powerpc__)
    147#define UCONTEXT_NIA(UC)	(UC)->uc_mcontext.uc_regs->gregs[PT_NIP]
    148#define UCONTEXT_MSR(UC)	(UC)->uc_mcontext.uc_regs->gregs[PT_MSR]
    149#else
    150#error implement UCONTEXT_NIA
    151#endif
    152
    153#endif /* _SELFTESTS_POWERPC_UTILS_H */