test_encl_bootstrap.S (2082B)
1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * Copyright(c) 2016-20 Intel Corporation. 4 */ 5 6 .macro ENCLU 7 .byte 0x0f, 0x01, 0xd7 8 .endm 9 10 .section ".tcs", "aw" 11 .balign 4096 12 13 .fill 1, 8, 0 # STATE (set by CPU) 14 .fill 1, 8, 0 # FLAGS 15 .quad encl_ssa_tcs1 # OSSA 16 .fill 1, 4, 0 # CSSA (set by CPU) 17 .fill 1, 4, 1 # NSSA 18 .quad encl_entry # OENTRY 19 .fill 1, 8, 0 # AEP (set by EENTER and ERESUME) 20 .fill 1, 8, 0 # OFSBASE 21 .fill 1, 8, 0 # OGSBASE 22 .fill 1, 4, 0xFFFFFFFF # FSLIMIT 23 .fill 1, 4, 0xFFFFFFFF # GSLIMIT 24 .fill 4024, 1, 0 # Reserved 25 26 # TCS2 27 .fill 1, 8, 0 # STATE (set by CPU) 28 .fill 1, 8, 0 # FLAGS 29 .quad encl_ssa_tcs2 # OSSA 30 .fill 1, 4, 0 # CSSA (set by CPU) 31 .fill 1, 4, 1 # NSSA 32 .quad encl_entry # OENTRY 33 .fill 1, 8, 0 # AEP (set by EENTER and ERESUME) 34 .fill 1, 8, 0 # OFSBASE 35 .fill 1, 8, 0 # OGSBASE 36 .fill 1, 4, 0xFFFFFFFF # FSLIMIT 37 .fill 1, 4, 0xFFFFFFFF # GSLIMIT 38 .fill 4024, 1, 0 # Reserved 39 40 .text 41 42encl_entry: 43 # RBX contains the base address for TCS, which is the first address 44 # inside the enclave for TCS #1 and one page into the enclave for 45 # TCS #2. By adding the value of encl_stack to it, we get 46 # the absolute address for the stack. 47 lea (encl_stack)(%rbx), %rax 48 xchg %rsp, %rax 49 push %rax 50 51 push %rcx # push the address after EENTER 52 push %rbx # push the enclave base address 53 54 call encl_body 55 56 pop %rbx # pop the enclave base address 57 58 /* Clear volatile GPRs, except RAX (EEXIT function). */ 59 xor %rcx, %rcx 60 xor %rdx, %rdx 61 xor %rdi, %rdi 62 xor %rsi, %rsi 63 xor %r8, %r8 64 xor %r9, %r9 65 xor %r10, %r10 66 xor %r11, %r11 67 68 # Reset status flags. 69 add %rdx, %rdx # OF = SF = AF = CF = 0; ZF = PF = 1 70 71 # Prepare EEXIT target by popping the address of the instruction after 72 # EENTER to RBX. 73 pop %rbx 74 75 # Restore the caller stack. 76 pop %rax 77 mov %rax, %rsp 78 79 # EEXIT 80 mov $4, %rax 81 enclu 82 83 .section ".data", "aw" 84 85encl_ssa_tcs1: 86 .space 4096 87encl_ssa_tcs2: 88 .space 4096 89 90 .balign 4096 91 # Stack of TCS #1 92 .space 4096 93encl_stack: 94 .balign 4096 95 # Stack of TCS #2 96 .space 4096