From 15554c668705bcbaa9da3fbf2a1efe45bb42adc4 Mon Sep 17 00:00:00 2001 From: Louis Burda Date: Mon, 6 Feb 2023 19:34:57 -0600 Subject: fixup! Save registers to xmm to lower baseline counts and avoid timing issues with apic_oneshot The cpu register state is cleared after vmrun in sev-es, as such we need to reload cpc_ds for probing and cpc_prime_probe. Since the access locations are constant, these extra loads will simply end up in the baseline. Additionally, the apic precision is not affected as the acceses happen *after* vmrun --- arch/x86/kvm/svm/vmenter.S | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/x86/kvm/svm/vmenter.S b/arch/x86/kvm/svm/vmenter.S index 1a3e83e5a277..01cf98e16b57 100644 --- a/arch/x86/kvm/svm/vmenter.S +++ b/arch/x86/kvm/svm/vmenter.S @@ -289,6 +289,10 @@ SYM_FUNC_START(__svm_sev_es_vcpu_run) 1: vmrun %_ASM_AX 2: cli + # in sev-es the cpu register state is not restored after vmrun.. + # xmm regs have been cleared so we need to do an extra accesses + movq cpc_ds_probe, %xmm8 + movq cpc_prime_probe, %xmm14 wrap_probe sev_es_vcpu_run #ifdef CONFIG_RETPOLINE -- cgit v1.2.3-71-gd317