From ca9a563805f7ae821e3303b1bdbc65d3a3c783ff Mon Sep 17 00:00:00 2001 From: Zubair Lutfullah Date: Thu, 19 Sep 2013 07:24:00 +0100 Subject: iio: ti_am335x_adc: Add continuous sampling support Previously the driver had only one-shot reading functionality. This patch adds continuous sampling support to the driver. Continuous sampling starts when buffer is enabled. HW IRQ wakes worker thread that pushes samples to userspace. Sampling stops when buffer is disabled by userspace. Patil Rachna (TI) laid the ground work for ADC HW register access. Russ Dill (TI) fixed bugs in the driver relevant to FIFOs and IRQs. I fixed channel scanning so multiple ADC channels can be read simultaneously and pushed to userspace. Restructured the driver to fit IIO ABI. And added INDIO_BUFFER_HARDWARE mode. Signed-off-by: Zubair Lutfullah Acked-by: Greg Kroah-Hartman Signed-off-by: Russ Dill Acked-by: Lee Jones Acked-by: Sebastian Andrzej Siewior Signed-off-by: Jonathan Cameron --- include/linux/mfd/ti_am335x_tscadc.h | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'include/linux/mfd') diff --git a/include/linux/mfd/ti_am335x_tscadc.h b/include/linux/mfd/ti_am335x_tscadc.h index db1791bb997a..7d98562b3b51 100644 --- a/include/linux/mfd/ti_am335x_tscadc.h +++ b/include/linux/mfd/ti_am335x_tscadc.h @@ -46,16 +46,24 @@ /* Step Enable */ #define STEPENB_MASK (0x1FFFF << 0) #define STEPENB(val) ((val) << 0) +#define ENB(val) (1 << (val)) +#define STPENB_STEPENB STEPENB(0x1FFFF) +#define STPENB_STEPENB_TC STEPENB(0x1FFF) /* IRQ enable */ #define IRQENB_HW_PEN BIT(0) #define IRQENB_FIFO0THRES BIT(2) +#define IRQENB_FIFO0OVRRUN BIT(3) +#define IRQENB_FIFO0UNDRFLW BIT(4) #define IRQENB_FIFO1THRES BIT(5) +#define IRQENB_FIFO1OVRRUN BIT(6) +#define IRQENB_FIFO1UNDRFLW BIT(7) #define IRQENB_PENUP BIT(9) /* Step Configuration */ #define STEPCONFIG_MODE_MASK (3 << 0) #define STEPCONFIG_MODE(val) ((val) << 0) +#define STEPCONFIG_MODE_SWCNT STEPCONFIG_MODE(1) #define STEPCONFIG_MODE_HWSYNC STEPCONFIG_MODE(2) #define STEPCONFIG_AVG_MASK (7 << 2) #define STEPCONFIG_AVG(val) ((val) << 2) @@ -124,6 +132,7 @@ #define MAX_CLK_DIV 7 #define TOTAL_STEPS 16 #define TOTAL_CHANNELS 8 +#define FIFO1_THRESHOLD 19 /* * ADC runs at 3MHz, and it takes -- cgit v1.2.3-71-gd317 From b0f4fe1edf6abbc81500d661f730cebd653a838c Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Thu, 6 Jun 2013 11:57:27 +0100 Subject: mfd: dbx500-prcmu: Correctly reorder PRCMU clock identifiers ... as stipulated by the Hardware Specification document. Acked-by: Samuel Ortiz Signed-off-by: Lee Jones Signed-off-by: Linus Walleij --- include/linux/mfd/dbx500-prcmu.h | 135 ++++++++++++++++++++------------------- 1 file changed, 71 insertions(+), 64 deletions(-) (limited to 'include/linux/mfd') diff --git a/include/linux/mfd/dbx500-prcmu.h b/include/linux/mfd/dbx500-prcmu.h index ca0790fba2f5..87667d48602b 100644 --- a/include/linux/mfd/dbx500-prcmu.h +++ b/include/linux/mfd/dbx500-prcmu.h @@ -97,70 +97,77 @@ enum prcmu_wakeup_index { /* * Clock identifiers. */ -enum prcmu_clock { - PRCMU_SGACLK, - PRCMU_UARTCLK, - PRCMU_MSP02CLK, - PRCMU_MSP1CLK, - PRCMU_I2CCLK, - PRCMU_SDMMCCLK, - PRCMU_SPARE1CLK, - PRCMU_SLIMCLK, - PRCMU_PER1CLK, - PRCMU_PER2CLK, - PRCMU_PER3CLK, - PRCMU_PER5CLK, - PRCMU_PER6CLK, - PRCMU_PER7CLK, - PRCMU_LCDCLK, - PRCMU_BMLCLK, - PRCMU_HSITXCLK, - PRCMU_HSIRXCLK, - PRCMU_HDMICLK, - PRCMU_APEATCLK, - PRCMU_APETRACECLK, - PRCMU_MCDECLK, - PRCMU_IPI2CCLK, - PRCMU_DSIALTCLK, - PRCMU_DMACLK, - PRCMU_B2R2CLK, - PRCMU_TVCLK, - PRCMU_SSPCLK, - PRCMU_RNGCLK, - PRCMU_UICCCLK, - PRCMU_PWMCLK, - PRCMU_IRDACLK, - PRCMU_IRRCCLK, - PRCMU_SIACLK, - PRCMU_SVACLK, - PRCMU_ACLK, - PRCMU_HVACLK, /* Ux540 only */ - PRCMU_G1CLK, /* Ux540 only */ - PRCMU_SDMMCHCLK, - PRCMU_CAMCLK, - PRCMU_BML8580CLK, - PRCMU_NUM_REG_CLOCKS, - PRCMU_SYSCLK = PRCMU_NUM_REG_CLOCKS, - PRCMU_CDCLK, - PRCMU_TIMCLK, - PRCMU_PLLSOC0, - PRCMU_PLLSOC1, - PRCMU_ARMSS, - PRCMU_PLLDDR, - PRCMU_PLLDSI, - PRCMU_DSI0CLK, - PRCMU_DSI1CLK, - PRCMU_DSI0ESCCLK, - PRCMU_DSI1ESCCLK, - PRCMU_DSI2ESCCLK, - /* LCD DSI PLL - Ux540 only */ - PRCMU_PLLDSI_LCD, - PRCMU_DSI0CLK_LCD, - PRCMU_DSI1CLK_LCD, - PRCMU_DSI0ESCCLK_LCD, - PRCMU_DSI1ESCCLK_LCD, - PRCMU_DSI2ESCCLK_LCD, -}; +#define ARMCLK 0 +#define PRCMU_ACLK 1 +#define PRCMU_SVAMMCSPCLK 2 +#define PRCMU_SDMMCHCLK 2 /* DBx540 only. */ +#define PRCMU_SIACLK 3 +#define PRCMU_SIAMMDSPCLK 3 /* DBx540 only. */ +#define PRCMU_SGACLK 4 +#define PRCMU_UARTCLK 5 +#define PRCMU_MSP02CLK 6 +#define PRCMU_MSP1CLK 7 +#define PRCMU_I2CCLK 8 +#define PRCMU_SDMMCCLK 9 +#define PRCMU_SLIMCLK 10 +#define PRCMU_CAMCLK 10 /* DBx540 only. */ +#define PRCMU_PER1CLK 11 +#define PRCMU_PER2CLK 12 +#define PRCMU_PER3CLK 13 +#define PRCMU_PER5CLK 14 +#define PRCMU_PER6CLK 15 +#define PRCMU_PER7CLK 16 +#define PRCMU_LCDCLK 17 +#define PRCMU_BMLCLK 18 +#define PRCMU_HSITXCLK 19 +#define PRCMU_HSIRXCLK 20 +#define PRCMU_HDMICLK 21 +#define PRCMU_APEATCLK 22 +#define PRCMU_APETRACECLK 23 +#define PRCMU_MCDECLK 24 +#define PRCMU_IPI2CCLK 25 +#define PRCMU_DSIALTCLK 26 +#define PRCMU_DMACLK 27 +#define PRCMU_B2R2CLK 28 +#define PRCMU_TVCLK 29 +#define SPARE_UNIPROCLK 30 +#define PRCMU_SSPCLK 31 +#define PRCMU_RNGCLK 32 +#define PRCMU_UICCCLK 33 +#define PRCMU_G1CLK 34 /* DBx540 only. */ +#define PRCMU_HVACLK 35 /* DBx540 only. */ +#define PRCMU_SPARE1CLK 36 +#define PRCMU_SPARE2CLK 37 + +#define PRCMU_NUM_REG_CLOCKS 38 + +#define PRCMU_RTCCLK PRCMU_NUM_REG_CLOCKS +#define PRCMU_SYSCLK 39 +#define PRCMU_CDCLK 40 +#define PRCMU_TIMCLK 41 +#define PRCMU_PLLSOC0 42 +#define PRCMU_PLLSOC1 43 +#define PRCMU_ARMSS 44 +#define PRCMU_PLLDDR 45 +#define PRCMU_BML8580CLK 46 + +/* DSI Clocks */ +#define PRCMU_PLLDSI 47 +#define PRCMU_DSI0CLK 48 +#define PRCMU_DSI1CLK 49 +#define PRCMU_DSI0ESCCLK 50 +#define PRCMU_DSI1ESCCLK 51 +#define PRCMU_DSI2ESCCLK 52 + +/* LCD DSI PLL - Ux540 only */ +#define PRCMU_PLLDSI_LCD 53 +#define PRCMU_DSI0CLK_LCD 54 +#define PRCMU_DSI1CLK_LCD 55 +#define PRCMU_DSI0ESCCLK_LCD 56 +#define PRCMU_DSI1ESCCLK_LCD 57 +#define PRCMU_DSI2ESCCLK_LCD 58 + +#define PRCMU_NUM_CLKS 59 /** * enum prcmu_wdog_id - PRCMU watchdog IDs -- cgit v1.2.3-71-gd317 From 67f13daadccebf95c04f73db7b78cead844540bd Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Thu, 6 Jun 2013 11:50:47 +0100 Subject: mfd: dbx500-prcmu: Move PRCMU numerical clock identifiers into DT include file These are required to request DBx500 PRCMU clocks from Device Tree. The numbers used are taken directly from the Hardware Specification document. We're moving them from the DBx500 PRCMU include file into the DT include directory and referencing them from the former via a #include. Acked-by: Samuel Ortiz Signed-off-by: Lee Jones Signed-off-by: Linus Walleij --- include/dt-bindings/mfd/dbx500-prcmu.h | 84 ++++++++++++++++++++++++++++++++++ include/linux/mfd/dbx500-prcmu.h | 77 +------------------------------ 2 files changed, 86 insertions(+), 75 deletions(-) create mode 100644 include/dt-bindings/mfd/dbx500-prcmu.h (limited to 'include/linux/mfd') diff --git a/include/dt-bindings/mfd/dbx500-prcmu.h b/include/dt-bindings/mfd/dbx500-prcmu.h new file mode 100644 index 000000000000..b7ee8c909908 --- /dev/null +++ b/include/dt-bindings/mfd/dbx500-prcmu.h @@ -0,0 +1,84 @@ +/* + * This header provides constants for the PRCMU bindings. + * + */ + +#ifndef _DT_BINDINGS_MFD_PRCMU_H +#define _DT_BINDINGS_MFD_PRCMU_H + +/* + * Clock identifiers. + */ +#define ARMCLK 0 +#define PRCMU_ACLK 1 +#define PRCMU_SVAMMCSPCLK 2 +#define PRCMU_SDMMCHCLK 2 /* DBx540 only. */ +#define PRCMU_SIACLK 3 +#define PRCMU_SIAMMDSPCLK 3 /* DBx540 only. */ +#define PRCMU_SGACLK 4 +#define PRCMU_UARTCLK 5 +#define PRCMU_MSP02CLK 6 +#define PRCMU_MSP1CLK 7 +#define PRCMU_I2CCLK 8 +#define PRCMU_SDMMCCLK 9 +#define PRCMU_SLIMCLK 10 +#define PRCMU_CAMCLK 10 /* DBx540 only. */ +#define PRCMU_PER1CLK 11 +#define PRCMU_PER2CLK 12 +#define PRCMU_PER3CLK 13 +#define PRCMU_PER5CLK 14 +#define PRCMU_PER6CLK 15 +#define PRCMU_PER7CLK 16 +#define PRCMU_LCDCLK 17 +#define PRCMU_BMLCLK 18 +#define PRCMU_HSITXCLK 19 +#define PRCMU_HSIRXCLK 20 +#define PRCMU_HDMICLK 21 +#define PRCMU_APEATCLK 22 +#define PRCMU_APETRACECLK 23 +#define PRCMU_MCDECLK 24 +#define PRCMU_IPI2CCLK 25 +#define PRCMU_DSIALTCLK 26 +#define PRCMU_DMACLK 27 +#define PRCMU_B2R2CLK 28 +#define PRCMU_TVCLK 29 +#define SPARE_UNIPROCLK 30 +#define PRCMU_SSPCLK 31 +#define PRCMU_RNGCLK 32 +#define PRCMU_UICCCLK 33 +#define PRCMU_G1CLK 34 /* DBx540 only. */ +#define PRCMU_HVACLK 35 /* DBx540 only. */ +#define PRCMU_SPARE1CLK 36 +#define PRCMU_SPARE2CLK 37 + +#define PRCMU_NUM_REG_CLOCKS 38 + +#define PRCMU_RTCCLK PRCMU_NUM_REG_CLOCKS +#define PRCMU_SYSCLK 39 +#define PRCMU_CDCLK 40 +#define PRCMU_TIMCLK 41 +#define PRCMU_PLLSOC0 42 +#define PRCMU_PLLSOC1 43 +#define PRCMU_ARMSS 44 +#define PRCMU_PLLDDR 45 +#define PRCMU_BML8580CLK 46 + +/* DSI Clocks */ +#define PRCMU_PLLDSI 47 +#define PRCMU_DSI0CLK 48 +#define PRCMU_DSI1CLK 49 +#define PRCMU_DSI0ESCCLK 50 +#define PRCMU_DSI1ESCCLK 51 +#define PRCMU_DSI2ESCCLK 52 + +/* LCD DSI PLL - Ux540 only */ +#define PRCMU_PLLDSI_LCD 53 +#define PRCMU_DSI0CLK_LCD 54 +#define PRCMU_DSI1CLK_LCD 55 +#define PRCMU_DSI0ESCCLK_LCD 56 +#define PRCMU_DSI1ESCCLK_LCD 57 +#define PRCMU_DSI2ESCCLK_LCD 58 + +#define PRCMU_NUM_CLKS 59 + +#endif diff --git a/include/linux/mfd/dbx500-prcmu.h b/include/linux/mfd/dbx500-prcmu.h index 87667d48602b..060e11256fbc 100644 --- a/include/linux/mfd/dbx500-prcmu.h +++ b/include/linux/mfd/dbx500-prcmu.h @@ -12,6 +12,8 @@ #include #include +#include /* For clock identifiers */ + /* Offset for the firmware version within the TCPM */ #define DB8500_PRCMU_FW_VERSION_OFFSET 0xA4 #define DBX540_PRCMU_FW_VERSION_OFFSET 0xA8 @@ -94,81 +96,6 @@ enum prcmu_wakeup_index { #define PRCMU_CLKSRC_ARMCLKFIX 0x46 #define PRCMU_CLKSRC_HDMICLK 0x47 -/* - * Clock identifiers. - */ -#define ARMCLK 0 -#define PRCMU_ACLK 1 -#define PRCMU_SVAMMCSPCLK 2 -#define PRCMU_SDMMCHCLK 2 /* DBx540 only. */ -#define PRCMU_SIACLK 3 -#define PRCMU_SIAMMDSPCLK 3 /* DBx540 only. */ -#define PRCMU_SGACLK 4 -#define PRCMU_UARTCLK 5 -#define PRCMU_MSP02CLK 6 -#define PRCMU_MSP1CLK 7 -#define PRCMU_I2CCLK 8 -#define PRCMU_SDMMCCLK 9 -#define PRCMU_SLIMCLK 10 -#define PRCMU_CAMCLK 10 /* DBx540 only. */ -#define PRCMU_PER1CLK 11 -#define PRCMU_PER2CLK 12 -#define PRCMU_PER3CLK 13 -#define PRCMU_PER5CLK 14 -#define PRCMU_PER6CLK 15 -#define PRCMU_PER7CLK 16 -#define PRCMU_LCDCLK 17 -#define PRCMU_BMLCLK 18 -#define PRCMU_HSITXCLK 19 -#define PRCMU_HSIRXCLK 20 -#define PRCMU_HDMICLK 21 -#define PRCMU_APEATCLK 22 -#define PRCMU_APETRACECLK 23 -#define PRCMU_MCDECLK 24 -#define PRCMU_IPI2CCLK 25 -#define PRCMU_DSIALTCLK 26 -#define PRCMU_DMACLK 27 -#define PRCMU_B2R2CLK 28 -#define PRCMU_TVCLK 29 -#define SPARE_UNIPROCLK 30 -#define PRCMU_SSPCLK 31 -#define PRCMU_RNGCLK 32 -#define PRCMU_UICCCLK 33 -#define PRCMU_G1CLK 34 /* DBx540 only. */ -#define PRCMU_HVACLK 35 /* DBx540 only. */ -#define PRCMU_SPARE1CLK 36 -#define PRCMU_SPARE2CLK 37 - -#define PRCMU_NUM_REG_CLOCKS 38 - -#define PRCMU_RTCCLK PRCMU_NUM_REG_CLOCKS -#define PRCMU_SYSCLK 39 -#define PRCMU_CDCLK 40 -#define PRCMU_TIMCLK 41 -#define PRCMU_PLLSOC0 42 -#define PRCMU_PLLSOC1 43 -#define PRCMU_ARMSS 44 -#define PRCMU_PLLDDR 45 -#define PRCMU_BML8580CLK 46 - -/* DSI Clocks */ -#define PRCMU_PLLDSI 47 -#define PRCMU_DSI0CLK 48 -#define PRCMU_DSI1CLK 49 -#define PRCMU_DSI0ESCCLK 50 -#define PRCMU_DSI1ESCCLK 51 -#define PRCMU_DSI2ESCCLK 52 - -/* LCD DSI PLL - Ux540 only */ -#define PRCMU_PLLDSI_LCD 53 -#define PRCMU_DSI0CLK_LCD 54 -#define PRCMU_DSI1CLK_LCD 55 -#define PRCMU_DSI0ESCCLK_LCD 56 -#define PRCMU_DSI1ESCCLK_LCD 57 -#define PRCMU_DSI2ESCCLK_LCD 58 - -#define PRCMU_NUM_CLKS 59 - /** * enum prcmu_wdog_id - PRCMU watchdog IDs * @PRCMU_WDOG_ALL: use all timers -- cgit v1.2.3-71-gd317 From 8d6a35fb13406f87d926fffeee0d70360ce3077d Mon Sep 17 00:00:00 2001 From: Sean Cross Date: Thu, 26 Sep 2013 11:24:46 +0800 Subject: ARM: imx6q: Add PCIe bits to GPR syscon definition PCIe requires additional bits be defined for GPR8 and GPR12. Signed-off-by: Sean Cross Signed-off-by: Shawn Guo Signed-off-by: Bjorn Helgaas --- include/linux/mfd/syscon/imx6q-iomuxc-gpr.h | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'include/linux/mfd') diff --git a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h index b6bdcd66c07d..e00e9f362fd5 100644 --- a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h +++ b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h @@ -241,6 +241,12 @@ #define IMX6Q_GPR5_L2_CLK_STOP BIT(8) +#define IMX6Q_GPR8_TX_SWING_LOW (0x7f << 25) +#define IMX6Q_GPR8_TX_SWING_FULL (0x7f << 18) +#define IMX6Q_GPR8_TX_DEEMPH_GEN2_6DB (0x3f << 12) +#define IMX6Q_GPR8_TX_DEEMPH_GEN2_3P5DB (0x3f << 6) +#define IMX6Q_GPR8_TX_DEEMPH_GEN1 (0x3f << 0) + #define IMX6Q_GPR9_TZASC2_BYP BIT(1) #define IMX6Q_GPR9_TZASC1_BYP BIT(0) @@ -273,7 +279,9 @@ #define IMX6Q_GPR12_ARMP_AHB_CLK_EN BIT(26) #define IMX6Q_GPR12_ARMP_ATB_CLK_EN BIT(25) #define IMX6Q_GPR12_ARMP_APB_CLK_EN BIT(24) +#define IMX6Q_GPR12_DEVICE_TYPE (0xf << 12) #define IMX6Q_GPR12_PCIE_CTL_2 BIT(10) +#define IMX6Q_GPR12_LOS_LEVEL (0x1f << 4) #define IMX6Q_GPR13_SDMA_STOP_REQ BIT(30) #define IMX6Q_GPR13_CAN2_STOP_REQ BIT(29) -- cgit v1.2.3-71-gd317 From 3f79410c7c9c8ef33ccff60c61e1f1166f5ed64a Mon Sep 17 00:00:00 2001 From: Maxime Jayat Date: Sat, 12 Oct 2013 01:29:46 +0200 Subject: treewide: Fix common typo in "identify" Correct common misspelling of "identify" as "indentify" throughout the kernel Signed-off-by: Maxime Jayat Signed-off-by: Jiri Kosina --- arch/mips/include/asm/octeon/cvmx-pip.h | 4 ++-- arch/x86/kernel/cpu/intel_cacheinfo.c | 2 +- arch/x86/kernel/cpu/scattered.c | 2 +- drivers/media/rc/keymaps/rc-dib0700-nec.c | 2 +- drivers/media/rc/keymaps/rc-dib0700-rc5.c | 2 +- drivers/net/irda/ali-ircc.c | 2 +- drivers/net/irda/nsc-ircc.c | 2 +- drivers/s390/scsi/zfcp_dbf.c | 6 +++--- drivers/scsi/bnx2i/bnx2i_hwi.c | 16 ++++++++-------- drivers/scsi/bnx2i/bnx2i_iscsi.c | 14 +++++++------- drivers/scsi/ncr53c8xx.c | 2 +- drivers/scsi/sym53c8xx_2/sym_glue.h | 2 +- drivers/staging/iio/adc/ad7606.h | 2 +- include/linux/amba/serial.h | 2 +- include/linux/mfd/si476x-core.h | 2 +- include/linux/netdevice.h | 2 +- include/net/bluetooth/l2cap.h | 2 +- net/can/af_can.c | 2 +- net/netfilter/xt_set.c | 4 ++-- 19 files changed, 36 insertions(+), 36 deletions(-) (limited to 'include/linux/mfd') diff --git a/arch/mips/include/asm/octeon/cvmx-pip.h b/arch/mips/include/asm/octeon/cvmx-pip.h index a76fe5a57a9f..df69bfd2b006 100644 --- a/arch/mips/include/asm/octeon/cvmx-pip.h +++ b/arch/mips/include/asm/octeon/cvmx-pip.h @@ -192,13 +192,13 @@ typedef struct { /* Number of packets processed by PIP */ uint32_t packets; /* - * Number of indentified L2 multicast packets. Does not + * Number of identified L2 multicast packets. Does not * include broadcast packets. Only includes packets whose * parse mode is SKIP_TO_L2 */ uint32_t multicast_packets; /* - * Number of indentified L2 broadcast packets. Does not + * Number of identified L2 broadcast packets. Does not * include multicast packets. Only includes packets whose * parse mode is SKIP_TO_L2 */ diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c index 1414c90feaba..0641113e2965 100644 --- a/arch/x86/kernel/cpu/intel_cacheinfo.c +++ b/arch/x86/kernel/cpu/intel_cacheinfo.c @@ -1,5 +1,5 @@ /* - * Routines to indentify caches on Intel CPU. + * Routines to identify caches on Intel CPU. * * Changes: * Venkatesh Pallipadi : Adding cache identification through cpuid(4) diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c index f2cc63e9cf08..b6f794aa1693 100644 --- a/arch/x86/kernel/cpu/scattered.c +++ b/arch/x86/kernel/cpu/scattered.c @@ -1,5 +1,5 @@ /* - * Routines to indentify additional cpu features that are scattered in + * Routines to identify additional cpu features that are scattered in * cpuid space. */ #include diff --git a/drivers/media/rc/keymaps/rc-dib0700-nec.c b/drivers/media/rc/keymaps/rc-dib0700-nec.c index 4d13a7f2e5c3..492a05ade7e1 100644 --- a/drivers/media/rc/keymaps/rc-dib0700-nec.c +++ b/drivers/media/rc/keymaps/rc-dib0700-nec.c @@ -5,7 +5,7 @@ * TODO: This table is a real mess, as it merges RC codes from several * devices into a big table. It also has both RC-5 and NEC codes inside. * It should be broken into small tables, and the protocols should properly - * be indentificated. + * be identificated. * * The table were imported from dib0700_devices.c. * diff --git a/drivers/media/rc/keymaps/rc-dib0700-rc5.c b/drivers/media/rc/keymaps/rc-dib0700-rc5.c index ba81d9697cfc..454ea596a7ee 100644 --- a/drivers/media/rc/keymaps/rc-dib0700-rc5.c +++ b/drivers/media/rc/keymaps/rc-dib0700-rc5.c @@ -5,7 +5,7 @@ * TODO: This table is a real mess, as it merges RC codes from several * devices into a big table. It also has both RC-5 and NEC codes inside. * It should be broken into small tables, and the protocols should properly - * be indentificated. + * be identificated. * * The table were imported from dib0700_devices.c. * diff --git a/drivers/net/irda/ali-ircc.c b/drivers/net/irda/ali-ircc.c index 7bbd318bc93e..befa45f809c3 100644 --- a/drivers/net/irda/ali-ircc.c +++ b/drivers/net/irda/ali-ircc.c @@ -627,7 +627,7 @@ static int ali_ircc_setup(chipio_t *info) /* * Function ali_ircc_read_dongle_id (int index, info) * - * Try to read dongle indentification. This procedure needs to be executed + * Try to read dongle identification. This procedure needs to be executed * once after power-on/reset. It also needs to be used whenever you suspect * that the user may have plugged/unplugged the IrDA Dongle. */ diff --git a/drivers/net/irda/nsc-ircc.c b/drivers/net/irda/nsc-ircc.c index ceeb53737f86..66bc03bdb138 100644 --- a/drivers/net/irda/nsc-ircc.c +++ b/drivers/net/irda/nsc-ircc.c @@ -1035,7 +1035,7 @@ static int nsc_ircc_setup(chipio_t *info) /* * Function nsc_ircc_read_dongle_id (void) * - * Try to read dongle indentification. This procedure needs to be executed + * Try to read dongle identification. This procedure needs to be executed * once after power-on/reset. It also needs to be used whenever you suspect * that the user may have plugged/unplugged the IrDA Dongle. */ diff --git a/drivers/s390/scsi/zfcp_dbf.c b/drivers/s390/scsi/zfcp_dbf.c index 132a905b6bdb..0ca64484cfa3 100644 --- a/drivers/s390/scsi/zfcp_dbf.c +++ b/drivers/s390/scsi/zfcp_dbf.c @@ -344,7 +344,7 @@ void zfcp_dbf_san(char *tag, struct zfcp_dbf *dbf, void *data, u8 id, u16 len, /** * zfcp_dbf_san_req - trace event for issued SAN request - * @tag: indentifier for event + * @tag: identifier for event * @fsf_req: request containing issued CT data * d_id: destination ID */ @@ -361,7 +361,7 @@ void zfcp_dbf_san_req(char *tag, struct zfcp_fsf_req *fsf, u32 d_id) /** * zfcp_dbf_san_res - trace event for received SAN request - * @tag: indentifier for event + * @tag: identifier for event * @fsf_req: request containing issued CT data */ void zfcp_dbf_san_res(char *tag, struct zfcp_fsf_req *fsf) @@ -377,7 +377,7 @@ void zfcp_dbf_san_res(char *tag, struct zfcp_fsf_req *fsf) /** * zfcp_dbf_san_in_els - trace event for incoming ELS - * @tag: indentifier for event + * @tag: identifier for event * @fsf_req: request containing issued CT data */ void zfcp_dbf_san_in_els(char *tag, struct zfcp_fsf_req *fsf) diff --git a/drivers/scsi/bnx2i/bnx2i_hwi.c b/drivers/scsi/bnx2i/bnx2i_hwi.c index af3e675d4d48..886e2f9eb0ea 100644 --- a/drivers/scsi/bnx2i/bnx2i_hwi.c +++ b/drivers/scsi/bnx2i/bnx2i_hwi.c @@ -126,7 +126,7 @@ static void bnx2i_iscsi_license_error(struct bnx2i_hba *hba, u32 error_code) /** * bnx2i_arm_cq_event_coalescing - arms CQ to enable EQ notification - * @ep: endpoint (transport indentifier) structure + * @ep: endpoint (transport identifier) structure * @action: action, ARM or DISARM. For now only ARM_CQE is used * * Arm'ing CQ will enable chip to generate global EQ events inorder to interrupt @@ -756,7 +756,7 @@ void bnx2i_send_cmd_cleanup_req(struct bnx2i_hba *hba, struct bnx2i_cmd *cmd) /** * bnx2i_send_conn_destroy - initiates iscsi connection teardown process * @hba: adapter structure pointer - * @ep: endpoint (transport indentifier) structure + * @ep: endpoint (transport identifier) structure * * this routine prepares and posts CONN_OFLD_REQ1/2 KWQE to initiate * iscsi connection context clean-up process @@ -791,7 +791,7 @@ int bnx2i_send_conn_destroy(struct bnx2i_hba *hba, struct bnx2i_endpoint *ep) /** * bnx2i_570x_send_conn_ofld_req - initiates iscsi conn context setup process * @hba: adapter structure pointer - * @ep: endpoint (transport indentifier) structure + * @ep: endpoint (transport identifier) structure * * 5706/5708/5709 specific - prepares and posts CONN_OFLD_REQ1/2 KWQE */ @@ -851,7 +851,7 @@ static int bnx2i_570x_send_conn_ofld_req(struct bnx2i_hba *hba, /** * bnx2i_5771x_send_conn_ofld_req - initiates iscsi connection context creation * @hba: adapter structure pointer - * @ep: endpoint (transport indentifier) structure + * @ep: endpoint (transport identifier) structure * * 57710 specific - prepares and posts CONN_OFLD_REQ1/2 KWQE */ @@ -920,7 +920,7 @@ static int bnx2i_5771x_send_conn_ofld_req(struct bnx2i_hba *hba, * bnx2i_send_conn_ofld_req - initiates iscsi connection context setup process * * @hba: adapter structure pointer - * @ep: endpoint (transport indentifier) structure + * @ep: endpoint (transport identifier) structure * * this routine prepares and posts CONN_OFLD_REQ1/2 KWQE */ @@ -939,7 +939,7 @@ int bnx2i_send_conn_ofld_req(struct bnx2i_hba *hba, struct bnx2i_endpoint *ep) /** * setup_qp_page_tables - iscsi QP page table setup function - * @ep: endpoint (transport indentifier) structure + * @ep: endpoint (transport identifier) structure * * Sets up page tables for SQ/RQ/CQ, 1G/sec (5706/5708/5709) devices requires * 64-bit address in big endian format. Whereas 10G/sec (57710) requires @@ -1046,7 +1046,7 @@ static void setup_qp_page_tables(struct bnx2i_endpoint *ep) /** * bnx2i_alloc_qp_resc - allocates required resources for QP. * @hba: adapter structure pointer - * @ep: endpoint (transport indentifier) structure + * @ep: endpoint (transport identifier) structure * * Allocate QP (transport layer for iSCSI connection) resources, DMA'able * memory for SQ/RQ/CQ and page tables. EP structure elements such @@ -1191,7 +1191,7 @@ mem_alloc_err: /** * bnx2i_free_qp_resc - free memory resources held by QP * @hba: adapter structure pointer - * @ep: endpoint (transport indentifier) structure + * @ep: endpoint (transport identifier) structure * * Free QP resources - SQ/RQ/CQ memory and page tables. */ diff --git a/drivers/scsi/bnx2i/bnx2i_iscsi.c b/drivers/scsi/bnx2i/bnx2i_iscsi.c index fabeb88602ac..854dad7d5b03 100644 --- a/drivers/scsi/bnx2i/bnx2i_iscsi.c +++ b/drivers/scsi/bnx2i/bnx2i_iscsi.c @@ -596,7 +596,7 @@ void bnx2i_drop_session(struct iscsi_cls_session *cls_session) /** * bnx2i_ep_destroy_list_add - add an entry to EP destroy list * @hba: pointer to adapter instance - * @ep: pointer to endpoint (transport indentifier) structure + * @ep: pointer to endpoint (transport identifier) structure * * EP destroy queue manager */ @@ -613,7 +613,7 @@ static int bnx2i_ep_destroy_list_add(struct bnx2i_hba *hba, * bnx2i_ep_destroy_list_del - add an entry to EP destroy list * * @hba: pointer to adapter instance - * @ep: pointer to endpoint (transport indentifier) structure + * @ep: pointer to endpoint (transport identifier) structure * * EP destroy queue manager */ @@ -630,7 +630,7 @@ static int bnx2i_ep_destroy_list_del(struct bnx2i_hba *hba, /** * bnx2i_ep_ofld_list_add - add an entry to ep offload pending list * @hba: pointer to adapter instance - * @ep: pointer to endpoint (transport indentifier) structure + * @ep: pointer to endpoint (transport identifier) structure * * pending conn offload completion queue manager */ @@ -646,7 +646,7 @@ static int bnx2i_ep_ofld_list_add(struct bnx2i_hba *hba, /** * bnx2i_ep_ofld_list_del - add an entry to ep offload pending list * @hba: pointer to adapter instance - * @ep: pointer to endpoint (transport indentifier) structure + * @ep: pointer to endpoint (transport identifier) structure * * pending conn offload completion queue manager */ @@ -721,7 +721,7 @@ bnx2i_find_ep_in_destroy_list(struct bnx2i_hba *hba, u32 iscsi_cid) /** * bnx2i_ep_active_list_add - add an entry to ep active list * @hba: pointer to adapter instance - * @ep: pointer to endpoint (transport indentifier) structure + * @ep: pointer to endpoint (transport identifier) structure * * current active conn queue manager */ @@ -737,7 +737,7 @@ static void bnx2i_ep_active_list_add(struct bnx2i_hba *hba, /** * bnx2i_ep_active_list_del - deletes an entry to ep active list * @hba: pointer to adapter instance - * @ep: pointer to endpoint (transport indentifier) structure + * @ep: pointer to endpoint (transport identifier) structure * * current active conn queue manager */ @@ -1695,7 +1695,7 @@ no_nx2_route: /** * bnx2i_tear_down_conn - tear down iscsi/tcp connection and free resources * @hba: pointer to adapter instance - * @ep: endpoint (transport indentifier) structure + * @ep: endpoint (transport identifier) structure * * destroys cm_sock structure and on chip iscsi context */ diff --git a/drivers/scsi/ncr53c8xx.c b/drivers/scsi/ncr53c8xx.c index 5982a587babc..7d014b11df62 100644 --- a/drivers/scsi/ncr53c8xx.c +++ b/drivers/scsi/ncr53c8xx.c @@ -1615,7 +1615,7 @@ struct ncb { spinlock_t smp_lock; /* Lock for SMP threading */ /*---------------------------------------------------------------- - ** Chip and controller indentification. + ** Chip and controller identification. **---------------------------------------------------------------- */ int unit; /* Unit number */ diff --git a/drivers/scsi/sym53c8xx_2/sym_glue.h b/drivers/scsi/sym53c8xx_2/sym_glue.h index b80bf709f104..805369521df8 100644 --- a/drivers/scsi/sym53c8xx_2/sym_glue.h +++ b/drivers/scsi/sym53c8xx_2/sym_glue.h @@ -174,7 +174,7 @@ struct sym_slcb { */ struct sym_shcb { /* - * Chip and controller indentification. + * Chip and controller identification. */ int unit; char inst_name[16]; diff --git a/drivers/staging/iio/adc/ad7606.h b/drivers/staging/iio/adc/ad7606.h index 9221a74efd18..93c7299e8353 100644 --- a/drivers/staging/iio/adc/ad7606.h +++ b/drivers/staging/iio/adc/ad7606.h @@ -42,7 +42,7 @@ struct ad7606_platform_data { /** * struct ad7606_chip_info - chip specifc information - * @name: indentification string for chip + * @name: identification string for chip * @int_vref_mv: the internal reference voltage * @channels: channel specification * @num_channels: number of channels diff --git a/include/linux/amba/serial.h b/include/linux/amba/serial.h index 62d9303c2837..0ddb5c02ad8b 100644 --- a/include/linux/amba/serial.h +++ b/include/linux/amba/serial.h @@ -40,7 +40,7 @@ #define UART010_LCRL 0x10 /* Line control register, low byte. */ #define UART010_CR 0x14 /* Control register. */ #define UART01x_FR 0x18 /* Flag register (Read only). */ -#define UART010_IIR 0x1C /* Interrupt indentification register (Read). */ +#define UART010_IIR 0x1C /* Interrupt identification register (Read). */ #define UART010_ICR 0x1C /* Interrupt clear register (Write). */ #define ST_UART011_LCRH_RX 0x1C /* Rx line control register. */ #define UART01x_ILPR 0x20 /* IrDA low power counter register. */ diff --git a/include/linux/mfd/si476x-core.h b/include/linux/mfd/si476x-core.h index ba89b94e4a56..674b45d5a757 100644 --- a/include/linux/mfd/si476x-core.h +++ b/include/linux/mfd/si476x-core.h @@ -316,7 +316,7 @@ enum si476x_smoothmetrics { * response to 'FM_RD_STATUS' command * @rdstpptyint: Traffic program flag(TP) and/or program type(PTY) * code has changed. - * @rdspiint: Program indentifiaction(PI) code has changed. + * @rdspiint: Program identification(PI) code has changed. * @rdssyncint: RDS synchronization has changed. * @rdsfifoint: RDS was received and the RDS FIFO has at least * 'FM_RDS_INTERRUPT_FIFO_COUNT' elements in it. diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h index 8ed4ae943053..9ff50c9a0009 100644 --- a/include/linux/netdevice.h +++ b/include/linux/netdevice.h @@ -1546,7 +1546,7 @@ static inline void *netdev_priv(const struct net_device *dev) #define SET_NETDEV_DEV(net, pdev) ((net)->dev.parent = (pdev)) /* Set the sysfs device type for the network logical device to allow - * fin grained indentification of different network device types. For + * fine-grained identification of different network device types. For * example Ethernet, Wirelss LAN, Bluetooth, WiMAX etc. */ #define SET_NETDEV_DEVTYPE(net, devtype) ((net)->dev.type = (devtype)) diff --git a/include/net/bluetooth/l2cap.h b/include/net/bluetooth/l2cap.h index 1a966afbbfa8..7170b4b434e1 100644 --- a/include/net/bluetooth/l2cap.h +++ b/include/net/bluetooth/l2cap.h @@ -238,7 +238,7 @@ struct l2cap_conn_rsp { #define L2CAP_PSM_SDP 0x0001 #define L2CAP_PSM_RFCOMM 0x0003 -/* channel indentifier */ +/* channel identifier */ #define L2CAP_CID_SIGNALING 0x0001 #define L2CAP_CID_CONN_LESS 0x0002 #define L2CAP_CID_A2MP 0x0003 diff --git a/net/can/af_can.c b/net/can/af_can.c index 3ab8dd2e1282..d249874a366d 100644 --- a/net/can/af_can.c +++ b/net/can/af_can.c @@ -420,7 +420,7 @@ static struct hlist_head *find_rcv_list(canid_t *can_id, canid_t *mask, * @mask: CAN mask (see description) * @func: callback function on filter match * @data: returned parameter for callback function - * @ident: string for calling module indentification + * @ident: string for calling module identification * * Description: * Invokes the callback function with the received sk_buff and the given diff --git a/net/netfilter/xt_set.c b/net/netfilter/xt_set.c index 31790e789e22..4b9d6b4f1eb0 100644 --- a/net/netfilter/xt_set.c +++ b/net/netfilter/xt_set.c @@ -84,7 +84,7 @@ set_match_v0_checkentry(const struct xt_mtchk_param *par) index = ip_set_nfnl_get_byindex(info->match_set.index); if (index == IPSET_INVALID_ID) { - pr_warning("Cannot find set indentified by id %u to match\n", + pr_warning("Cannot find set identified by id %u to match\n", info->match_set.index); return -ENOENT; } @@ -205,7 +205,7 @@ set_match_v1_checkentry(const struct xt_mtchk_param *par) index = ip_set_nfnl_get_byindex(info->match_set.index); if (index == IPSET_INVALID_ID) { - pr_warning("Cannot find set indentified by id %u to match\n", + pr_warning("Cannot find set identified by id %u to match\n", info->match_set.index); return -ENOENT; } -- cgit v1.2.3-71-gd317 From 7f6ac89c1d1e0c654ea02c8c2dd0ee8e1ce2795f Mon Sep 17 00:00:00 2001 From: Fugang Duan Date: Tue, 3 Sep 2013 12:26:24 +0800 Subject: ARM: imx6sl: add imx6sl iomux-gpr field define Add imx6sl iomux-gpr register field define in "imx6q-iomuxc-gpr.h" header file, which is not fully define all iomux-gpr registers and fields, only add fec related macro define. Signed-off-by: Fugang Duan Signed-off-by: Shawn Guo --- include/linux/mfd/syscon/imx6q-iomuxc-gpr.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include/linux/mfd') diff --git a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h index b6bdcd66c07d..7086b2248c8f 100644 --- a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h +++ b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h @@ -363,4 +363,9 @@ #define IMX6Q_GPR13_SATA_TX_LVL_1_240_V (0x1f << 2) #define IMX6Q_GPR13_SATA_MPLL_CLK_EN BIT(1) #define IMX6Q_GPR13_SATA_TX_EDGE_RATE BIT(0) + +/* For imx6sl iomux gpr register field define */ +#define IMX6SL_GPR1_FEC_CLOCK_MUX1_SEL_MASK (0x3 << 17) +#define IMX6SL_GPR1_FEC_CLOCK_MUX2_SEL_MASK (0x1 << 14) + #endif /* __LINUX_IMX6Q_IOMUXC_GPR_H */ -- cgit v1.2.3-71-gd317 From 7fcd427465e710d0c4e2737d2f02b2ffa14b9bb3 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 15 Oct 2013 20:14:21 +0100 Subject: mfd: Allow mapping regulator supplies to MFD device from children Occasionally, it is useful to map supplies from a child device onto the MFD device. A typical usecase for this would be if the MFD device is represented as a single node in device tree. All supplies will be defined in device tree as existing on the MFD device. When a child depends on frameworks which might have no knowledge of MFD to lookup supplies on its behalf the supply will not be found. This patch adds a list of supplies that should be looked up on the parent rather than the child as part of the mfd_cell structure. Signed-off-by: Charles Keepax Acked-by: Lee Jones Signed-off-by: Mark Brown --- drivers/mfd/mfd-core.c | 22 +++++++++++++++++----- include/linux/mfd/core.h | 6 ++++++ 2 files changed, 23 insertions(+), 5 deletions(-) (limited to 'include/linux/mfd') diff --git a/drivers/mfd/mfd-core.c b/drivers/mfd/mfd-core.c index f421586f29fb..adc8ea36e7c4 100644 --- a/drivers/mfd/mfd-core.c +++ b/drivers/mfd/mfd-core.c @@ -20,6 +20,7 @@ #include #include #include +#include static struct device_type mfd_dev_type = { .name = "mfd_device", @@ -99,6 +100,13 @@ static int mfd_add_device(struct device *parent, int id, pdev->dev.dma_mask = parent->dma_mask; pdev->dev.dma_parms = parent->dma_parms; + ret = devm_regulator_bulk_register_supply_alias( + &pdev->dev, cell->parent_supplies, + parent, cell->parent_supplies, + cell->num_parent_supplies); + if (ret < 0) + goto fail_res; + if (parent->of_node && cell->of_compatible) { for_each_child_of_node(parent->of_node, np) { if (of_device_is_compatible(np, cell->of_compatible)) { @@ -112,12 +120,12 @@ static int mfd_add_device(struct device *parent, int id, ret = platform_device_add_data(pdev, cell->platform_data, cell->pdata_size); if (ret) - goto fail_res; + goto fail_alias; } ret = mfd_platform_add_cell(pdev, cell); if (ret) - goto fail_res; + goto fail_alias; for (r = 0; r < cell->num_resources; r++) { res[r].name = cell->resources[r].name; @@ -152,17 +160,17 @@ static int mfd_add_device(struct device *parent, int id, if (!cell->ignore_resource_conflicts) { ret = acpi_check_resource_conflict(&res[r]); if (ret) - goto fail_res; + goto fail_alias; } } ret = platform_device_add_resources(pdev, res, cell->num_resources); if (ret) - goto fail_res; + goto fail_alias; ret = platform_device_add(pdev); if (ret) - goto fail_res; + goto fail_alias; if (cell->pm_runtime_no_callbacks) pm_runtime_no_callbacks(&pdev->dev); @@ -171,6 +179,10 @@ static int mfd_add_device(struct device *parent, int id, return 0; +fail_alias: + devm_regulator_bulk_unregister_supply_alias(&pdev->dev, + cell->parent_supplies, + cell->num_parent_supplies); fail_res: kfree(res); fail_device: diff --git a/include/linux/mfd/core.h b/include/linux/mfd/core.h index cebe97ee98b8..7314fc4e6d25 100644 --- a/include/linux/mfd/core.h +++ b/include/linux/mfd/core.h @@ -59,6 +59,12 @@ struct mfd_cell { * pm_runtime_no_callbacks(). */ bool pm_runtime_no_callbacks; + + /* A list of regulator supplies that should be mapped to the MFD + * device rather than the child device when requested + */ + const char **parent_supplies; + int num_parent_supplies; }; /* -- cgit v1.2.3-71-gd317 From 43e30f23b589642a7eaff005bc30444a5247976c Mon Sep 17 00:00:00 2001 From: David Jander Date: Mon, 2 Sep 2013 09:46:11 +0200 Subject: mfd: da9052: Avoid multiwrite mode due to silicon errata DA9053 (up to revision bc) can corrupt internal registers when multi-write mode is enabled and power is removed or during shutdown. Signed-off-by: David Jander Signed-off-by: Lee Jones --- drivers/mfd/da9052-i2c.c | 12 ++++++++---- include/linux/mfd/da9052/da9052.h | 20 ++++++++++++++------ 2 files changed, 22 insertions(+), 10 deletions(-) (limited to 'include/linux/mfd') diff --git a/drivers/mfd/da9052-i2c.c b/drivers/mfd/da9052-i2c.c index 6a9fec40d018..c319c4ef5d49 100644 --- a/drivers/mfd/da9052-i2c.c +++ b/drivers/mfd/da9052-i2c.c @@ -86,7 +86,11 @@ static int da9052_i2c_fix(struct da9052 *da9052, unsigned char reg) return 0; } -static int da9052_i2c_enable_multiwrite(struct da9052 *da9052) +/* + * According to errata item 24, multiwrite mode should be avoided + * in order to prevent register data corruption after power-down. + */ +static int da9052_i2c_disable_multiwrite(struct da9052 *da9052) { int reg_val, ret; @@ -94,8 +98,8 @@ static int da9052_i2c_enable_multiwrite(struct da9052 *da9052) if (ret < 0) return ret; - if (reg_val & DA9052_CONTROL_B_WRITEMODE) { - reg_val &= ~DA9052_CONTROL_B_WRITEMODE; + if (!(reg_val & DA9052_CONTROL_B_WRITEMODE)) { + reg_val |= DA9052_CONTROL_B_WRITEMODE; ret = regmap_write(da9052->regmap, DA9052_CONTROL_B_REG, reg_val); if (ret < 0) @@ -154,7 +158,7 @@ static int da9052_i2c_probe(struct i2c_client *client, return ret; } - ret = da9052_i2c_enable_multiwrite(da9052); + ret = da9052_i2c_disable_multiwrite(da9052); if (ret < 0) return ret; diff --git a/include/linux/mfd/da9052/da9052.h b/include/linux/mfd/da9052/da9052.h index 786d02eb79d2..21e21b81cc75 100644 --- a/include/linux/mfd/da9052/da9052.h +++ b/include/linux/mfd/da9052/da9052.h @@ -148,10 +148,15 @@ static inline int da9052_group_read(struct da9052 *da9052, unsigned char reg, unsigned reg_cnt, unsigned char *val) { int ret; + unsigned int tmp; + int i; - ret = regmap_bulk_read(da9052->regmap, reg, val, reg_cnt); - if (ret < 0) - return ret; + for (i = 0; i < reg_cnt; i++) { + ret = regmap_read(da9052->regmap, reg + i, &tmp); + val[i] = (unsigned char)tmp; + if (ret < 0) + return ret; + } if (da9052->fix_io) { ret = da9052->fix_io(da9052, reg); @@ -166,10 +171,13 @@ static inline int da9052_group_write(struct da9052 *da9052, unsigned char reg, unsigned reg_cnt, unsigned char *val) { int ret; + int i; - ret = regmap_raw_write(da9052->regmap, reg, val, reg_cnt); - if (ret < 0) - return ret; + for (i = 0; i < reg_cnt; i++) { + ret = regmap_write(da9052->regmap, reg + i, val[i]); + if (ret < 0) + return ret; + } if (da9052->fix_io) { ret = da9052->fix_io(da9052, reg); -- cgit v1.2.3-71-gd317 From b5f90240e1ef0568a8c666da3c3be4c6a682c5a6 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Fri, 6 Sep 2013 16:14:28 +0100 Subject: mfd: wm8994: Inline register I/O functions Since the register I/O functions are all simple wrappers for the regmap equivalents inline them to provide a small code size saving and an example of good practice. Signed-off-by: Mark Brown Signed-off-by: Lee Jones --- drivers/mfd/wm8994-core.c | 78 ----------------------------------------- include/linux/mfd/wm8994/core.h | 45 +++++++++++++++++++----- 2 files changed, 36 insertions(+), 87 deletions(-) (limited to 'include/linux/mfd') diff --git a/drivers/mfd/wm8994-core.c b/drivers/mfd/wm8994-core.c index e1c283e6d4e5..030827511667 100644 --- a/drivers/mfd/wm8994-core.c +++ b/drivers/mfd/wm8994-core.c @@ -33,84 +33,6 @@ #include "wm8994.h" -/** - * wm8994_reg_read: Read a single WM8994 register. - * - * @wm8994: Device to read from. - * @reg: Register to read. - */ -int wm8994_reg_read(struct wm8994 *wm8994, unsigned short reg) -{ - unsigned int val; - int ret; - - ret = regmap_read(wm8994->regmap, reg, &val); - - if (ret < 0) - return ret; - else - return val; -} -EXPORT_SYMBOL_GPL(wm8994_reg_read); - -/** - * wm8994_bulk_read: Read multiple WM8994 registers - * - * @wm8994: Device to read from - * @reg: First register - * @count: Number of registers - * @buf: Buffer to fill. The data will be returned big endian. - */ -int wm8994_bulk_read(struct wm8994 *wm8994, unsigned short reg, - int count, u16 *buf) -{ - return regmap_bulk_read(wm8994->regmap, reg, buf, count); -} - -/** - * wm8994_reg_write: Write a single WM8994 register. - * - * @wm8994: Device to write to. - * @reg: Register to write to. - * @val: Value to write. - */ -int wm8994_reg_write(struct wm8994 *wm8994, unsigned short reg, - unsigned short val) -{ - return regmap_write(wm8994->regmap, reg, val); -} -EXPORT_SYMBOL_GPL(wm8994_reg_write); - -/** - * wm8994_bulk_write: Write multiple WM8994 registers - * - * @wm8994: Device to write to - * @reg: First register - * @count: Number of registers - * @buf: Buffer to write from. Data must be big-endian formatted. - */ -int wm8994_bulk_write(struct wm8994 *wm8994, unsigned short reg, - int count, const u16 *buf) -{ - return regmap_raw_write(wm8994->regmap, reg, buf, count * sizeof(u16)); -} -EXPORT_SYMBOL_GPL(wm8994_bulk_write); - -/** - * wm8994_set_bits: Set the value of a bitfield in a WM8994 register - * - * @wm8994: Device to write to. - * @reg: Register to write to. - * @mask: Mask of bits to set. - * @val: Value to set (unshifted) - */ -int wm8994_set_bits(struct wm8994 *wm8994, unsigned short reg, - unsigned short mask, unsigned short val) -{ - return regmap_update_bits(wm8994->regmap, reg, mask, val); -} -EXPORT_SYMBOL_GPL(wm8994_set_bits); - static struct mfd_cell wm8994_regulator_devs[] = { { .name = "wm8994-ldo", diff --git a/include/linux/mfd/wm8994/core.h b/include/linux/mfd/wm8994/core.h index 40854ac0ba3d..3fbcf3d4a0fe 100644 --- a/include/linux/mfd/wm8994/core.h +++ b/include/linux/mfd/wm8994/core.h @@ -85,16 +85,43 @@ struct wm8994 { }; /* Device I/O API */ -int wm8994_reg_read(struct wm8994 *wm8994, unsigned short reg); -int wm8994_reg_write(struct wm8994 *wm8994, unsigned short reg, - unsigned short val); -int wm8994_set_bits(struct wm8994 *wm8994, unsigned short reg, - unsigned short mask, unsigned short val); -int wm8994_bulk_read(struct wm8994 *wm8994, unsigned short reg, - int count, u16 *buf); -int wm8994_bulk_write(struct wm8994 *wm8994, unsigned short reg, - int count, const u16 *buf); +static inline int wm8994_reg_read(struct wm8994 *wm8994, unsigned short reg) +{ + unsigned int val; + int ret; + + ret = regmap_read(wm8994->regmap, reg, &val); + + if (ret < 0) + return ret; + else + return val; +} + +static inline int wm8994_reg_write(struct wm8994 *wm8994, unsigned short reg, + unsigned short val) +{ + return regmap_write(wm8994->regmap, reg, val); +} + +static inline int wm8994_bulk_read(struct wm8994 *wm8994, unsigned short reg, + int count, u16 *buf) +{ + return regmap_bulk_read(wm8994->regmap, reg, buf, count); +} + +static inline int wm8994_bulk_write(struct wm8994 *wm8994, unsigned short reg, + int count, const u16 *buf) +{ + return regmap_raw_write(wm8994->regmap, reg, buf, count * sizeof(u16)); +} + +static inline int wm8994_set_bits(struct wm8994 *wm8994, unsigned short reg, + unsigned short mask, unsigned short val) +{ + return regmap_update_bits(wm8994->regmap, reg, mask, val); +} /* Helper to save on boilerplate */ static inline int wm8994_request_irq(struct wm8994 *wm8994, int irq, -- cgit v1.2.3-71-gd317 From dae188c6092a3f085bf7fc335b6c0e0420d3dd8f Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Fri, 6 Sep 2013 17:48:35 +0100 Subject: mfd: wm8994: Remove unused irq_lock Since the conversion to regmap-irq irq_lock has been unused. Signed-off-by: Mark Brown Signed-off-by: Lee Jones --- include/linux/mfd/wm8994/core.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'include/linux/mfd') diff --git a/include/linux/mfd/wm8994/core.h b/include/linux/mfd/wm8994/core.h index 3fbcf3d4a0fe..eefafa62d304 100644 --- a/include/linux/mfd/wm8994/core.h +++ b/include/linux/mfd/wm8994/core.h @@ -56,8 +56,6 @@ struct irq_domain; #define WM8994_IRQ_GPIO(x) (x + WM8994_IRQ_TEMP_WARN) struct wm8994 { - struct mutex irq_lock; - struct wm8994_pdata pdata; enum wm8994_type type; -- cgit v1.2.3-71-gd317 From 1a54b7dabf8f20df2894aed9683155ff89fc20e8 Mon Sep 17 00:00:00 2001 From: Matthias Kaehlcke Date: Tue, 10 Sep 2013 23:02:18 +0200 Subject: mfd: ti_am335x_tscadc: Fix idle timeout value The old timeout value was based on the assumption that the minimum values are used for the open and sample delay and no averaging is done. In fact the ADC and touchscreen driver both use an open delay of 152 cycles and averaging over 16 samples. This patch adjusts the timeout value accordingly Signed-off-by: Matthias Kaehlcke Signed-off-by: Lee Jones --- include/linux/mfd/ti_am335x_tscadc.h | 19 ++++++++++++------- 1 file changed, 12 insertions(+), 7 deletions(-) (limited to 'include/linux/mfd') diff --git a/include/linux/mfd/ti_am335x_tscadc.h b/include/linux/mfd/ti_am335x_tscadc.h index 25f2c611ab01..4befdb85dd9c 100644 --- a/include/linux/mfd/ti_am335x_tscadc.h +++ b/include/linux/mfd/ti_am335x_tscadc.h @@ -125,13 +125,18 @@ #define TOTAL_CHANNELS 8 /* -* ADC runs at 3MHz, and it takes -* 15 cycles to latch one data output. -* Hence the idle time for ADC to -* process one sample data would be -* around 5 micro seconds. -*/ -#define IDLE_TIMEOUT 5 /* microsec */ + * time in us for processing a single channel, calculated as follows: + * + * num cycles = open delay + (sample delay + conv time) * averaging + * + * num cycles: 152 + (1 + 13) * 16 = 376 + * + * clock frequency: 26MHz / 8 = 3.25MHz + * clock period: 1 / 3.25MHz = 308ns + * + * processing time: 376 * 308ns = 116us + */ +#define IDLE_TIMEOUT 116 /* microsec */ #define TSCADC_CELLS 2 -- cgit v1.2.3-71-gd317 From 26b818511c6562ce372566c219a2ef1afea35fe6 Mon Sep 17 00:00:00 2001 From: Wei WANG Date: Fri, 13 Sep 2013 17:45:43 +0800 Subject: mfd: rtsx: Modify rts5249_optimize_phy In some platforms, specially Thinkpad series, rts5249 won't be initialized properly. So we need adjust some phy parameters to improve the compatibility issue. It is a little different between simulation and real chip. We have no idea about which configuration is better before tape-out. We set default settings according to simulation, but need to tune these parameters after getting the real chip. I can't explain every change in detail here. The below information is just a rough description: PHY_REG_REV: Disable internal clkreq_tx, enable rx_pwst PHY_BPCR: No change, just turn the magic number to macro definitions PHY_PCR: Change OOBS sensitivity, from 60mV to 90mV PHY_RCR2: Control charge-pump current automatically PHY_FLD4: Use TX cmu reference clock PHY_RDR: Change RXDSEL from 30nF to 1.9nF PHY_RCR1: Change the duration between adp_st and asserting cp_en from 0.32 us to 0.64us PHY_FLD3: Adjust internal timers PHY_TUNE: Fine tune the regulator12 output voltage Signed-off-by: Wei WANG Signed-off-by: Lee Jones --- drivers/mfd/rts5249.c | 48 +++++++++++++++++++++++++++++++++++++-- include/linux/mfd/rtsx_pci.h | 53 ++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 99 insertions(+), 2 deletions(-) (limited to 'include/linux/mfd') diff --git a/drivers/mfd/rts5249.c b/drivers/mfd/rts5249.c index 3b835f593e35..573de7bfcced 100644 --- a/drivers/mfd/rts5249.c +++ b/drivers/mfd/rts5249.c @@ -130,13 +130,57 @@ static int rts5249_optimize_phy(struct rtsx_pcr *pcr) { int err; - err = rtsx_pci_write_phy_register(pcr, PHY_REG_REV, 0xFE46); + err = rtsx_pci_write_phy_register(pcr, PHY_REG_REV, + PHY_REG_REV_RESV | PHY_REG_REV_RXIDLE_LATCHED | + PHY_REG_REV_P1_EN | PHY_REG_REV_RXIDLE_EN | + PHY_REG_REV_RX_PWST | PHY_REG_REV_CLKREQ_DLY_TIMER_1_0 | + PHY_REG_REV_STOP_CLKRD | PHY_REG_REV_STOP_CLKWR); if (err < 0) return err; msleep(1); - return rtsx_pci_write_phy_register(pcr, PHY_BPCR, 0x05C0); + err = rtsx_pci_write_phy_register(pcr, PHY_BPCR, + PHY_BPCR_IBRXSEL | PHY_BPCR_IBTXSEL | + PHY_BPCR_IB_FILTER | PHY_BPCR_CMIRROR_EN); + if (err < 0) + return err; + err = rtsx_pci_write_phy_register(pcr, PHY_PCR, + PHY_PCR_FORCE_CODE | PHY_PCR_OOBS_CALI_50 | + PHY_PCR_OOBS_VCM_08 | PHY_PCR_OOBS_SEN_90 | + PHY_PCR_RSSI_EN); + if (err < 0) + return err; + err = rtsx_pci_write_phy_register(pcr, PHY_RCR2, + PHY_RCR2_EMPHASE_EN | PHY_RCR2_NADJR | + PHY_RCR2_CDR_CP_10 | PHY_RCR2_CDR_SR_2 | + PHY_RCR2_FREQSEL_12 | PHY_RCR2_CPADJEN | + PHY_RCR2_CDR_SC_8 | PHY_RCR2_CALIB_LATE); + if (err < 0) + return err; + err = rtsx_pci_write_phy_register(pcr, PHY_FLD4, + PHY_FLD4_FLDEN_SEL | PHY_FLD4_REQ_REF | + PHY_FLD4_RXAMP_OFF | PHY_FLD4_REQ_ADDA | + PHY_FLD4_BER_COUNT | PHY_FLD4_BER_TIMER | + PHY_FLD4_BER_CHK_EN); + if (err < 0) + return err; + err = rtsx_pci_write_phy_register(pcr, PHY_RDR, PHY_RDR_RXDSEL_1_9); + if (err < 0) + return err; + err = rtsx_pci_write_phy_register(pcr, PHY_RCR1, + PHY_RCR1_ADP_TIME | PHY_RCR1_VCO_COARSE); + if (err < 0) + return err; + err = rtsx_pci_write_phy_register(pcr, PHY_FLD3, + PHY_FLD3_TIMER_4 | PHY_FLD3_TIMER_6 | + PHY_FLD3_RXDELINK); + if (err < 0) + return err; + return rtsx_pci_write_phy_register(pcr, PHY_TUNE, + PHY_TUNE_TUNEREF_1_0 | PHY_TUNE_VBGSEL_1252 | + PHY_TUNE_SDBUS_33 | PHY_TUNE_TUNED18 | + PHY_TUNE_TUNED12); } static int rts5249_turn_on_led(struct rtsx_pcr *pcr) diff --git a/include/linux/mfd/rtsx_pci.h b/include/linux/mfd/rtsx_pci.h index d1382dfbeff0..0ce772105508 100644 --- a/include/linux/mfd/rtsx_pci.h +++ b/include/linux/mfd/rtsx_pci.h @@ -756,6 +756,59 @@ #define PCR_SETTING_REG2 0x814 #define PCR_SETTING_REG3 0x747 +/* Phy bits */ +#define PHY_PCR_FORCE_CODE 0xB000 +#define PHY_PCR_OOBS_CALI_50 0x0800 +#define PHY_PCR_OOBS_VCM_08 0x0200 +#define PHY_PCR_OOBS_SEN_90 0x0040 +#define PHY_PCR_RSSI_EN 0x0002 + +#define PHY_RCR1_ADP_TIME 0x0100 +#define PHY_RCR1_VCO_COARSE 0x001F + +#define PHY_RCR2_EMPHASE_EN 0x8000 +#define PHY_RCR2_NADJR 0x4000 +#define PHY_RCR2_CDR_CP_10 0x0400 +#define PHY_RCR2_CDR_SR_2 0x0100 +#define PHY_RCR2_FREQSEL_12 0x0040 +#define PHY_RCR2_CPADJEN 0x0020 +#define PHY_RCR2_CDR_SC_8 0x0008 +#define PHY_RCR2_CALIB_LATE 0x0002 + +#define PHY_RDR_RXDSEL_1_9 0x4000 + +#define PHY_TUNE_TUNEREF_1_0 0x4000 +#define PHY_TUNE_VBGSEL_1252 0x0C00 +#define PHY_TUNE_SDBUS_33 0x0200 +#define PHY_TUNE_TUNED18 0x01C0 +#define PHY_TUNE_TUNED12 0X0020 + +#define PHY_BPCR_IBRXSEL 0x0400 +#define PHY_BPCR_IBTXSEL 0x0100 +#define PHY_BPCR_IB_FILTER 0x0080 +#define PHY_BPCR_CMIRROR_EN 0x0040 + +#define PHY_REG_REV_RESV 0xE000 +#define PHY_REG_REV_RXIDLE_LATCHED 0x1000 +#define PHY_REG_REV_P1_EN 0x0800 +#define PHY_REG_REV_RXIDLE_EN 0x0400 +#define PHY_REG_REV_CLKREQ_DLY_TIMER_1_0 0x0040 +#define PHY_REG_REV_STOP_CLKRD 0x0020 +#define PHY_REG_REV_RX_PWST 0x0008 +#define PHY_REG_REV_STOP_CLKWR 0x0004 + +#define PHY_FLD3_TIMER_4 0x7800 +#define PHY_FLD3_TIMER_6 0x00E0 +#define PHY_FLD3_RXDELINK 0x0004 + +#define PHY_FLD4_FLDEN_SEL 0x4000 +#define PHY_FLD4_REQ_REF 0x2000 +#define PHY_FLD4_RXAMP_OFF 0x1000 +#define PHY_FLD4_REQ_ADDA 0x0800 +#define PHY_FLD4_BER_COUNT 0x00E0 +#define PHY_FLD4_BER_TIMER 0x000A +#define PHY_FLD4_BER_CHK_EN 0x0001 + #define rtsx_pci_init_cmd(pcr) ((pcr)->ci = 0) struct rtsx_pcr; -- cgit v1.2.3-71-gd317 From ca13ce3701900c5b64c2c477a9cfea396c6e79c3 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Sat, 21 Sep 2013 11:02:04 +0100 Subject: mfd: arizona: Correct register definition for FLL2_SYNC_BW We had specified the mask twice for FLL2_SYNC_BW change the first mask definition in a bit definition to match the other fields. Signed-off-by: Charles Keepax Signed-off-by: Lee Jones --- include/linux/mfd/arizona/registers.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include/linux/mfd') diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 4706d3d46e56..cb49417f8ba9 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -1908,7 +1908,7 @@ #define ARIZONA_FLL2_SYNC_GAIN_MASK 0x003c /* FLL2_SYNC_GAIN */ #define ARIZONA_FLL2_SYNC_GAIN_SHIFT 2 /* FLL2_SYNC_GAIN */ #define ARIZONA_FLL2_SYNC_GAIN_WIDTH 4 /* FLL2_SYNC_GAIN */ -#define ARIZONA_FLL2_SYNC_BW_MASK 0x0001 /* FLL2_SYNC_BW */ +#define ARIZONA_FLL2_SYNC_BW 0x0001 /* FLL2_SYNC_BW */ #define ARIZONA_FLL2_SYNC_BW_MASK 0x0001 /* FLL2_SYNC_BW */ #define ARIZONA_FLL2_SYNC_BW_SHIFT 0 /* FLL2_SYNC_BW */ #define ARIZONA_FLL2_SYNC_BW_WIDTH 1 /* FLL2_SYNC_BW */ -- cgit v1.2.3-71-gd317 From 60013b94d9530346db963474f7fde8aecabaff25 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Sun, 22 Sep 2013 21:49:18 +0200 Subject: mfd: Add STw481x driver This adds a driver for the STw481x PMICs found in the Nomadik family of platforms. This one uses pure device tree probing. Print some of the OTP registers on boot and register a regulator MFD child. Signed-off-by: Linus Walleij Signed-off-by: Lee Jones --- drivers/mfd/Kconfig | 10 ++ drivers/mfd/Makefile | 1 + drivers/mfd/stw481x.c | 250 ++++++++++++++++++++++++++++++++++++++++++++ include/linux/mfd/stw481x.h | 56 ++++++++++ 4 files changed, 317 insertions(+) create mode 100644 drivers/mfd/stw481x.c create mode 100644 include/linux/mfd/stw481x.h (limited to 'include/linux/mfd') diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 914c3d142f78..d078fe4a82ef 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -1151,6 +1151,16 @@ config MFD_WM8994 core support for the WM8994, in order to use the actual functionaltiy of the device other drivers must be enabled. +config MFD_STW481X + bool "Support for ST Microelectronics STw481x" + depends on I2C && ARCH_NOMADIK + select REGMAP_I2C + select MFD_CORE + help + Select this option to enable the STw481x chip driver used + in various ST Microelectronics and ST-Ericsson embedded + Nomadik series. + endmenu endif diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 15b905c6553c..656cec90a1e5 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -162,3 +162,4 @@ obj-$(CONFIG_MFD_LM3533) += lm3533-core.o lm3533-ctrlbank.o obj-$(CONFIG_VEXPRESS_CONFIG) += vexpress-config.o vexpress-sysreg.o obj-$(CONFIG_MFD_RETU) += retu-mfd.o obj-$(CONFIG_MFD_AS3711) += as3711.o +obj-$(CONFIG_MFD_STW481X) += stw481x.o diff --git a/drivers/mfd/stw481x.c b/drivers/mfd/stw481x.c new file mode 100644 index 000000000000..1243d5c6a448 --- /dev/null +++ b/drivers/mfd/stw481x.c @@ -0,0 +1,250 @@ +/* + * Core driver for STw4810/STw4811 + * + * Copyright (C) 2013 ST-Ericsson SA + * Written on behalf of Linaro for ST-Ericsson + * + * Author: Linus Walleij + * + * License terms: GNU General Public License (GPL) version 2 + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * This driver can only access the non-USB portions of STw4811, the register + * range 0x00-0x10 dealing with USB is bound to the two special I2C pins used + * for USB control. + */ + +/* Registers inside the power control address space */ +#define STW_PC_VCORE_SEL 0x05U +#define STW_PC_VAUX_SEL 0x06U +#define STW_PC_VPLL_SEL 0x07U + +/** + * stw481x_get_pctl_reg() - get a power control register + * @stw481x: handle to the stw481x chip + * @reg: power control register to fetch + * + * The power control registers is a set of one-time-programmable registers + * in its own register space, accessed by writing addess bits to these + * two registers: bits 7,6,5 of PCTL_REG_LO corresponds to the 3 LSBs of + * the address and bits 8,9 of PCTL_REG_HI corresponds to the 2 MSBs of + * the address, forming an address space of 5 bits, i.e. 32 registers + * 0x00 ... 0x1f can be obtained. + */ +static int stw481x_get_pctl_reg(struct stw481x *stw481x, u8 reg) +{ + u8 msb = (reg >> 3) & 0x03; + u8 lsb = (reg << 5) & 0xe0; + unsigned int val; + u8 vrfy; + int ret; + + ret = regmap_write(stw481x->map, STW_PCTL_REG_HI, msb); + if (ret) + return ret; + ret = regmap_write(stw481x->map, STW_PCTL_REG_LO, lsb); + if (ret) + return ret; + ret = regmap_read(stw481x->map, STW_PCTL_REG_HI, &val); + if (ret) + return ret; + vrfy = (val & 0x03) << 3; + ret = regmap_read(stw481x->map, STW_PCTL_REG_LO, &val); + if (ret) + return ret; + vrfy |= ((val >> 5) & 0x07); + if (vrfy != reg) + return -EIO; + return (val >> 1) & 0x0f; +} + +static int stw481x_startup(struct stw481x *stw481x) +{ + /* Voltages multiplied by 100 */ + u8 vcore_val[] = { 100, 105, 110, 115, 120, 122, 124, 126, 128, + 130, 132, 134, 136, 138, 140, 145 }; + u8 vpll_val[] = { 105, 120, 130, 180 }; + u8 vaux_val[] = { 15, 18, 25, 28 }; + u8 vcore; + u8 vcore_slp; + u8 vpll; + u8 vaux; + bool vaux_en; + bool it_warn; + int ret; + unsigned int val; + + ret = regmap_read(stw481x->map, STW_CONF1, &val); + if (ret) + return ret; + vaux_en = !!(val & STW_CONF1_PDN_VAUX); + it_warn = !!(val & STW_CONF1_IT_WARN); + + dev_info(&stw481x->client->dev, "voltages %s\n", + (val & STW_CONF1_V_MONITORING) ? "OK" : "LOW"); + dev_info(&stw481x->client->dev, "MMC level shifter %s\n", + (val & STW_CONF1_MMC_LS_STATUS) ? "high impedance" : "ON"); + dev_info(&stw481x->client->dev, "VMMC: %s\n", + (val & STW_CONF1_PDN_VMMC) ? "ON" : "disabled"); + + dev_info(&stw481x->client->dev, "STw481x power control registers:\n"); + + ret = stw481x_get_pctl_reg(stw481x, STW_PC_VCORE_SEL); + if (ret < 0) + return ret; + vcore = ret & 0x0f; + + ret = stw481x_get_pctl_reg(stw481x, STW_PC_VAUX_SEL); + if (ret < 0) + return ret; + vaux = (ret >> 2) & 3; + vpll = (ret >> 4) & 1; /* Save bit 4 */ + + ret = stw481x_get_pctl_reg(stw481x, STW_PC_VPLL_SEL); + if (ret < 0) + return ret; + vpll |= (ret >> 1) & 2; + + dev_info(&stw481x->client->dev, "VCORE: %u.%uV %s\n", + vcore_val[vcore] / 100, vcore_val[vcore] % 100, + (ret & 4) ? "ON" : "OFF"); + + dev_info(&stw481x->client->dev, "VPLL: %u.%uV %s\n", + vpll_val[vpll] / 100, vpll_val[vpll] % 100, + (ret & 0x10) ? "ON" : "OFF"); + + dev_info(&stw481x->client->dev, "VAUX: %u.%uV %s\n", + vaux_val[vaux] / 10, vaux_val[vaux] % 10, + vaux_en ? "ON" : "OFF"); + + ret = regmap_read(stw481x->map, STW_CONF2, &val); + if (ret) + return ret; + + dev_info(&stw481x->client->dev, "TWARN: %s threshold, %s\n", + it_warn ? "below" : "above", + (val & STW_CONF2_MASK_TWARN) ? + "enabled" : "mask through VDDOK"); + dev_info(&stw481x->client->dev, "VMMC: %s\n", + (val & STW_CONF2_VMMC_EXT) ? "internal" : "external"); + dev_info(&stw481x->client->dev, "IT WAKE UP: %s\n", + (val & STW_CONF2_MASK_IT_WAKE_UP) ? "enabled" : "masked"); + dev_info(&stw481x->client->dev, "GPO1: %s\n", + (val & STW_CONF2_GPO1) ? "low" : "high impedance"); + dev_info(&stw481x->client->dev, "GPO2: %s\n", + (val & STW_CONF2_GPO2) ? "low" : "high impedance"); + + ret = regmap_read(stw481x->map, STW_VCORE_SLEEP, &val); + if (ret) + return ret; + vcore_slp = val & 0x0f; + dev_info(&stw481x->client->dev, "VCORE SLEEP: %u.%uV\n", + vcore_val[vcore_slp] / 100, vcore_val[vcore_slp] % 100); + + return 0; +} + +/* + * MFD cells - we have one cell which is selected operation + * mode, and we always have a GPIO cell. + */ +static struct mfd_cell stw481x_cells[] = { + { + .of_compatible = "st,stw481x-vmmc", + .name = "stw481x-vmmc-regulator", + .id = -1, + }, +}; + +const struct regmap_config stw481x_regmap_config = { + .reg_bits = 8, + .val_bits = 8, +}; + +static int stw481x_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct stw481x *stw481x; + int ret; + int i; + + stw481x = devm_kzalloc(&client->dev, sizeof(*stw481x), GFP_KERNEL); + if (!stw481x) + return -ENOMEM; + + i2c_set_clientdata(client, stw481x); + stw481x->client = client; + stw481x->map = devm_regmap_init_i2c(client, &stw481x_regmap_config); + + ret = stw481x_startup(stw481x); + if (ret) { + dev_err(&client->dev, "chip initialization failed\n"); + return ret; + } + + /* Set up and register the platform devices. */ + for (i = 0; i < ARRAY_SIZE(stw481x_cells); i++) { + /* One state holder for all drivers, this is simple */ + stw481x_cells[i].platform_data = stw481x; + stw481x_cells[i].pdata_size = sizeof(*stw481x); + } + + ret = mfd_add_devices(&client->dev, 0, stw481x_cells, + ARRAY_SIZE(stw481x_cells), NULL, 0, NULL); + if (ret) + return ret; + + dev_info(&client->dev, "initialized STw481x device\n"); + + return ret; +} + +static int stw481x_remove(struct i2c_client *client) +{ + mfd_remove_devices(&client->dev); + return 0; +} + +/* + * This ID table is completely unused, as this is a pure + * device-tree probed driver, but it has to be here due to + * the structure of the I2C core. + */ +static const struct i2c_device_id stw481x_id[] = { + { "stw481x", 0 }, + { }, +}; + +static const struct of_device_id stw481x_match[] = { + { .compatible = "st,stw4810", }, + { .compatible = "st,stw4811", }, + { }, +}; +MODULE_DEVICE_TABLE(of, stw481x_match); + +static struct i2c_driver stw481x_driver = { + .driver = { + .name = "stw481x", + .of_match_table = stw481x_match, + }, + .probe = stw481x_probe, + .remove = stw481x_remove, + .id_table = stw481x_id, +}; + +module_i2c_driver(stw481x_driver); + +MODULE_AUTHOR("Linus Walleij"); +MODULE_DESCRIPTION("STw481x PMIC driver"); +MODULE_LICENSE("GPL v2"); diff --git a/include/linux/mfd/stw481x.h b/include/linux/mfd/stw481x.h new file mode 100644 index 000000000000..eda121556e5d --- /dev/null +++ b/include/linux/mfd/stw481x.h @@ -0,0 +1,56 @@ +/* + * Copyright (C) 2011 ST-Ericsson SA + * Written on behalf of Linaro for ST-Ericsson + * + * Author: Linus Walleij + * + * License terms: GNU General Public License (GPL) version 2 + */ +#ifndef MFD_STW481X_H +#define MFD_STW481X_H + +#include +#include +#include +#include + +/* These registers are accessed from more than one driver */ +#define STW_CONF1 0x11U +#define STW_CONF1_PDN_VMMC 0x01U +#define STW_CONF1_VMMC_MASK 0x0eU +#define STW_CONF1_VMMC_1_8V 0x02U +#define STW_CONF1_VMMC_2_85V 0x04U +#define STW_CONF1_VMMC_3V 0x06U +#define STW_CONF1_VMMC_1_85V 0x08U +#define STW_CONF1_VMMC_2_6V 0x0aU +#define STW_CONF1_VMMC_2_7V 0x0cU +#define STW_CONF1_VMMC_3_3V 0x0eU +#define STW_CONF1_MMC_LS_STATUS 0x10U +#define STW_PCTL_REG_LO 0x1eU +#define STW_PCTL_REG_HI 0x1fU +#define STW_CONF1_V_MONITORING 0x20U +#define STW_CONF1_IT_WARN 0x40U +#define STW_CONF1_PDN_VAUX 0x80U +#define STW_CONF2 0x20U +#define STW_CONF2_MASK_TWARN 0x01U +#define STW_CONF2_VMMC_EXT 0x02U +#define STW_CONF2_MASK_IT_WAKE_UP 0x04U +#define STW_CONF2_GPO1 0x08U +#define STW_CONF2_GPO2 0x10U +#define STW_VCORE_SLEEP 0x21U + +/** + * struct stw481x - state holder for the Stw481x drivers + * @mutex: mutex to serialize I2C accesses + * @i2c_client: corresponding I2C client + * @regulator: regulator device for regulator children + * @map: regmap handle to access device registers + */ +struct stw481x { + struct mutex lock; + struct i2c_client *client; + struct regulator_dev *vmmc_regulator; + struct regmap *map; +}; + +#endif -- cgit v1.2.3-71-gd317 From e90f875419967589d75d1a3e2b89c5f2720e794e Mon Sep 17 00:00:00 2001 From: Matthias Kaehlcke Date: Mon, 23 Sep 2013 22:43:29 +0200 Subject: mfd: ti_am335x_tscadc: Restore clock divider on resume The ADC clock divider needs to be restored on resume as the register content is lost when the ADC is powered down Signed-off-by: Matthias Kaehlcke Signed-off-by: Lee Jones --- drivers/mfd/ti_am335x_tscadc.c | 10 ++++++---- include/linux/mfd/ti_am335x_tscadc.h | 1 + 2 files changed, 7 insertions(+), 4 deletions(-) (limited to 'include/linux/mfd') diff --git a/drivers/mfd/ti_am335x_tscadc.c b/drivers/mfd/ti_am335x_tscadc.c index baaf5a8123bb..a3685d6ef674 100644 --- a/drivers/mfd/ti_am335x_tscadc.c +++ b/drivers/mfd/ti_am335x_tscadc.c @@ -95,7 +95,7 @@ static int ti_tscadc_probe(struct platform_device *pdev) const __be32 *cur; u32 val; int err, ctrl; - int clk_value, clock_rate; + int clock_rate; int tsc_wires = 0, adc_channels = 0, total_channels; int readouts = 0; @@ -196,11 +196,11 @@ static int ti_tscadc_probe(struct platform_device *pdev) } clock_rate = clk_get_rate(clk); clk_put(clk); - clk_value = clock_rate / ADC_CLK; + tscadc->clk_div = clock_rate / ADC_CLK; /* TSCADC_CLKDIV needs to be configured to the value minus 1 */ - clk_value = clk_value - 1; - tscadc_writel(tscadc, REG_CLKDIV, clk_value); + tscadc->clk_div--; + tscadc_writel(tscadc, REG_CLKDIV, tscadc->clk_div); /* Set the control register bits */ ctrl = CNTRLREG_STEPCONFIGWRT | @@ -303,6 +303,8 @@ static int tscadc_resume(struct device *dev) tscadc_writel(tscadc_dev, REG_CTRL, (restore | CNTRLREG_TSCSSENB)); + tscadc_writel(tscadc_dev, REG_CLKDIV, tscadc_dev->clk_div); + return 0; } diff --git a/include/linux/mfd/ti_am335x_tscadc.h b/include/linux/mfd/ti_am335x_tscadc.h index 4befdb85dd9c..7b68a061cd60 100644 --- a/include/linux/mfd/ti_am335x_tscadc.h +++ b/include/linux/mfd/ti_am335x_tscadc.h @@ -151,6 +151,7 @@ struct ti_tscadc_dev { struct mfd_cell cells[TSCADC_CELLS]; u32 reg_se_cache; spinlock_t reg_lock; + unsigned int clk_div; /* tsc device */ struct titsc *tsc; -- cgit v1.2.3-71-gd317 From 0248b4bfe56f0545c051e6230939ca8b95f1b037 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Mon, 23 Sep 2013 19:14:32 +0100 Subject: mfd: mc13xxx: Move SPI erratum workaround into SPI I/O function Move the workaround for double sending AUDIO_CODEC and AUDIO_DAC writes into the SPI core, aiding refactoring to eliminate the ASoC custom I/O functions and avoiding the extra writes for I2C. Signed-off-by: Mark Brown Signed-off-by: Lee Jones --- drivers/mfd/mc13xxx-spi.c | 5 +++++ include/linux/mfd/mc13xxx.h | 7 +++++++ sound/soc/codecs/mc13783.c | 4 ---- 3 files changed, 12 insertions(+), 4 deletions(-) (limited to 'include/linux/mfd') diff --git a/drivers/mfd/mc13xxx-spi.c b/drivers/mfd/mc13xxx-spi.c index 77189daadf1e..5f14ef6693c2 100644 --- a/drivers/mfd/mc13xxx-spi.c +++ b/drivers/mfd/mc13xxx-spi.c @@ -94,10 +94,15 @@ static int mc13xxx_spi_write(void *context, const void *data, size_t count) { struct device *dev = context; struct spi_device *spi = to_spi_device(dev); + const char *reg = data; if (count != 4) return -ENOTSUPP; + /* include errata fix for spi audio problems */ + if (*reg == MC13783_AUDIO_CODEC || *reg == MC13783_AUDIO_DAC) + spi_write(spi, data, count); + return spi_write(spi, data, count); } diff --git a/include/linux/mfd/mc13xxx.h b/include/linux/mfd/mc13xxx.h index 41ed59276c00..67c17b5a6f44 100644 --- a/include/linux/mfd/mc13xxx.h +++ b/include/linux/mfd/mc13xxx.h @@ -41,6 +41,13 @@ int mc13xxx_adc_do_conversion(struct mc13xxx *mc13xxx, unsigned int mode, unsigned int channel, u8 ato, bool atox, unsigned int *sample); +#define MC13783_AUDIO_RX0 36 +#define MC13783_AUDIO_RX1 37 +#define MC13783_AUDIO_TX 38 +#define MC13783_SSI_NETWORK 39 +#define MC13783_AUDIO_CODEC 40 +#define MC13783_AUDIO_DAC 41 + #define MC13XXX_IRQ_ADCDONE 0 #define MC13XXX_IRQ_ADCBISDONE 1 #define MC13XXX_IRQ_TS 2 diff --git a/sound/soc/codecs/mc13783.c b/sound/soc/codecs/mc13783.c index ea141e1d6f28..4d3c8fd8c5db 100644 --- a/sound/soc/codecs/mc13783.c +++ b/sound/soc/codecs/mc13783.c @@ -125,10 +125,6 @@ static int mc13783_write(struct snd_soc_codec *codec, ret = mc13xxx_reg_write(priv->mc13xxx, reg, value); - /* include errata fix for spi audio problems */ - if (reg == MC13783_AUDIO_CODEC || reg == MC13783_AUDIO_DAC) - ret = mc13xxx_reg_write(priv->mc13xxx, reg, value); - mc13xxx_unlock(priv->mc13xxx); return ret; -- cgit v1.2.3-71-gd317 From 4233a0aafb72985a4692a9e6af5c528811226ac1 Mon Sep 17 00:00:00 2001 From: Andrzej Hajda Date: Wed, 21 Aug 2013 18:53:33 +0200 Subject: mfd: max77693: Remove device wakeup from driver The patch removes wakeup related code from the driver and plaftorm data - it is already handled by i2c core using I2C_CLIENT_WAKE flag from struct i2c_board_info. As a result MFD itself do not requires platform data. Signed-off-by: Andrzej Hajda Signed-off-by: Kyungmin Park Signed-off-by: Lee Jones --- drivers/mfd/max77693.c | 10 ---------- include/linux/mfd/max77693-private.h | 1 - include/linux/mfd/max77693.h | 2 -- 3 files changed, 13 deletions(-) (limited to 'include/linux/mfd') diff --git a/drivers/mfd/max77693.c b/drivers/mfd/max77693.c index c04723efc707..27f5da3bc63a 100644 --- a/drivers/mfd/max77693.c +++ b/drivers/mfd/max77693.c @@ -110,15 +110,9 @@ static int max77693_i2c_probe(struct i2c_client *i2c, const struct i2c_device_id *id) { struct max77693_dev *max77693; - struct max77693_platform_data *pdata = dev_get_platdata(&i2c->dev); u8 reg_data; int ret = 0; - if (!pdata) { - dev_err(&i2c->dev, "No platform data found.\n"); - return -EINVAL; - } - max77693 = devm_kzalloc(&i2c->dev, sizeof(struct max77693_dev), GFP_KERNEL); if (max77693 == NULL) @@ -138,8 +132,6 @@ static int max77693_i2c_probe(struct i2c_client *i2c, return ret; } - max77693->wakeup = pdata->wakeup; - ret = max77693_read_reg(max77693->regmap, MAX77693_PMIC_REG_PMIC_ID2, ®_data); if (ret < 0) { @@ -179,8 +171,6 @@ static int max77693_i2c_probe(struct i2c_client *i2c, if (ret < 0) goto err_mfd; - device_init_wakeup(max77693->dev, pdata->wakeup); - return ret; err_mfd: diff --git a/include/linux/mfd/max77693-private.h b/include/linux/mfd/max77693-private.h index 244fb0d51589..3e050b933dd0 100644 --- a/include/linux/mfd/max77693-private.h +++ b/include/linux/mfd/max77693-private.h @@ -323,7 +323,6 @@ struct max77693_dev { int irq; int irq_gpio; - bool wakeup; struct mutex irqlock; int irq_masks_cur[MAX77693_IRQ_GROUP_NR]; int irq_masks_cache[MAX77693_IRQ_GROUP_NR]; diff --git a/include/linux/mfd/max77693.h b/include/linux/mfd/max77693.h index 676f0f388992..3f3dc45f93ee 100644 --- a/include/linux/mfd/max77693.h +++ b/include/linux/mfd/max77693.h @@ -64,8 +64,6 @@ struct max77693_muic_platform_data { }; struct max77693_platform_data { - int wakeup; - /* regulator data */ struct max77693_regulator_data *regulators; int num_regulators; -- cgit v1.2.3-71-gd317 From d460a6f3d67a8558fb58299518077888b7dbf5f3 Mon Sep 17 00:00:00 2001 From: Laxman Dewangan Date: Tue, 22 Oct 2013 13:08:46 +0530 Subject: mfd: Add support for ams AS3722 PMIC The ams AS3722 is a compact system PMU suitable for mobile phones, tablets etc. It has 4 DC/DC step-down regulators, 3 DC/DC step-down controller, 11 LDOs, RTC, automatic battery, temperature and over-current monitoring, 8 GPIOs, ADC and a watchdog. Add MFD core driver for the AS3722 to support core functionality. Acked-by: Stephen Warren Signed-off-by: Laxman Dewangan Signed-off-by: Florian Lobmaier Signed-off-by: Lee Jones --- Documentation/devicetree/bindings/mfd/as3722.txt | 194 ++++++++++ drivers/mfd/Kconfig | 12 + drivers/mfd/Makefile | 1 + drivers/mfd/as3722.c | 449 +++++++++++++++++++++++ include/dt-bindings/mfd/as3722.h | 52 +++ include/linux/mfd/as3722.h | 423 +++++++++++++++++++++ 6 files changed, 1131 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/as3722.txt create mode 100644 drivers/mfd/as3722.c create mode 100644 include/dt-bindings/mfd/as3722.h create mode 100644 include/linux/mfd/as3722.h (limited to 'include/linux/mfd') diff --git a/Documentation/devicetree/bindings/mfd/as3722.txt b/Documentation/devicetree/bindings/mfd/as3722.txt new file mode 100644 index 000000000000..fc2191ecfd6b --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/as3722.txt @@ -0,0 +1,194 @@ +* ams AS3722 Power management IC. + +Required properties: +------------------- +- compatible: Must be "ams,as3722". +- reg: I2C device address. +- interrupt-controller: AS3722 has internal interrupt controller which takes the + interrupt request from internal sub-blocks like RTC, regulators, GPIOs as well + as external input. +- #interrupt-cells: Should be set to 2 for IRQ number and flags. + The first cell is the IRQ number. IRQ numbers for different interrupt source + of AS3722 are defined at dt-bindings/mfd/as3722.h + The second cell is the flags, encoded as the trigger masks from binding document + interrupts.txt, using dt-bindings/irq. + +Optional submodule and their properties: +======================================= + +Pinmux and GPIO: +=============== +Device has 8 GPIO pins which can be configured as GPIO as well as the special IO +functions. + +Please refer to pinctrl-bindings.txt in this directory for details of the +common pinctrl bindings used by client devices, including the meaning of the +phrase "pin configuration node". + +Following are properties which is needed if GPIO and pinmux functionality +is required: + Required properties: + ------------------- + - gpio-controller: Marks the device node as a GPIO controller. + - #gpio-cells: Number of GPIO cells. Refer to binding document + gpio/gpio.txt + + Optional properties: + -------------------- + Following properties are require if pin control setting is required + at boot. + - pinctrl-names: A pinctrl state named "default" be defined, using the + bindings in pinctrl/pinctrl-binding.txt. + - pinctrl[0...n]: Properties to contain the phandle that refer to + different nodes of pin control settings. These nodes represents + the pin control setting of state 0 to state n. Each of these + nodes contains different subnodes to represents some desired + configuration for a list of pins. This configuration can + include the mux function to select on those pin(s), and + various pin configuration parameters, such as pull-up, + open drain. + + Each subnode have following properties: + Required properties: + - pins: List of pins. Valid values of pins properties are: + gpio0, gpio1, gpio2, gpio3, gpio4, gpio5, + gpio6, gpio7 + + Optional properties: + function, bias-disable, bias-pull-up, bias-pull-down, + bias-high-impedance, drive-open-drain. + + Valid values for function properties are: + gpio, interrupt-out, gpio-in-interrupt, + vsup-vbat-low-undebounce-out, + vsup-vbat-low-debounce-out, + voltage-in-standby, oc-pg-sd0, oc-pg-sd6, + powergood-out, pwm-in, pwm-out, clk32k-out, + watchdog-in, soft-reset-in + +Regulators: +=========== +Device has multiple DCDC and LDOs. The node "regulators" is require if regulator +functionality is needed. + +Following are properties of regulator subnode. + + Optional properties: + ------------------- + The input supply of regulators are the optional properties on the + regulator node. The input supply of these regulators are provided + through following properties: + vsup-sd2-supply: Input supply for SD2. + vsup-sd3-supply: Input supply for SD3. + vsup-sd4-supply: Input supply for SD4. + vsup-sd5-supply: Input supply for SD5. + vin-ldo0-supply: Input supply for LDO0. + vin-ldo1-6-supply: Input supply for LDO1 and LDO6. + vin-ldo2-5-7-supply: Input supply for LDO2, LDO5 and LDO7. + vin-ldo3-4-supply: Input supply for LDO3 and LDO4. + vin-ldo9-10-supply: Input supply for LDO9 and LDO10. + vin-ldo11-supply: Input supply for LDO11. + + Optional sub nodes for regulators: + --------------------------------- + The subnodes name is the name of regulator and it must be one of: + sd[0-6], ldo[0-7], ldo[9-11] + + Each sub-node should contain the constraints and initialization + information for that regulator. See regulator.txt for a description + of standard properties for these sub-nodes. + Additional optional custom properties are listed below. + ams,ext-control: External control of the rail. The option of + this properties will tell which external input is + controlling this rail. Valid values are 0, 1, 2 ad 3. + 0: There is no external control of this rail. + 1: Rail is controlled by ENABLE1 input pin. + 2: Rail is controlled by ENABLE2 input pin. + 3: Rail is controlled by ENABLE3 input pin. + Missing this property on DT will be assume as no + external control. The external control pin macros + are defined @dt-bindings/mfd/as3722.h + + ams,enable-tracking: Enable tracking with SD1, only supported + by LDO3. + +Example: +-------- +#include +... +ams3722 { + compatible = "ams,as3722"; + reg = <0x48>; + + interrupt-parent = <&intc>; + interrupt-controller; + #interrupt-cells = <2>; + + gpio-controller; + #gpio-cells = <2>; + + pinctrl-names = "default"; + pinctrl-0 = <&as3722_default>; + + as3722_default: pinmux { + gpio0 { + pins = "gpio0"; + function = "gpio"; + bias-pull-down; + }; + + gpio1_2_4_7 { + pins = "gpio1", "gpio2", "gpio4", "gpio7"; + function = "gpio"; + bias-pull-up; + }; + + gpio5 { + pins = "gpio5"; + function = "clk32k_out"; + }; + } + + regulators { + vsup-sd2-supply = <...>; + ... + + sd0 { + regulator-name = "vdd_cpu"; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1400000>; + regulator-always-on; + ams,ext-control = <2>; + }; + + sd1 { + regulator-name = "vdd_core"; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1400000>; + regulator-always-on; + ams,ext-control = <1>; + }; + + sd2 { + regulator-name = "vddio_ddr"; + regulator-min-microvolt = <1350000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + }; + + sd4 { + regulator-name = "avdd-hdmi-pex"; + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + regulator-always-on; + }; + + sd5 { + regulator-name = "vdd-1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + .... + }; +}; diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index d078fe4a82ef..b7c74a73d371 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -27,6 +27,18 @@ config MFD_AS3711 help Support for the AS3711 PMIC from AMS +config MFD_AS3722 + bool "ams AS3722 Power Management IC" + select MFD_CORE + select REGMAP_I2C + select REGMAP_IRQ + depends on I2C && OF + help + The ams AS3722 is a compact system PMU suitable for mobile phones, + tablets etc. It has 4 DC/DC step-down regulators, 3 DC/DC step-down + controllers, 11 LDOs, RTC, automatic battery, temperature and + over current monitoring, GPIOs, ADC and a watchdog. + config PMIC_ADP5520 bool "Analog Devices ADP5520/01 MFD PMIC Core Support" depends on I2C=y diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 656cec90a1e5..8a28dc90fe78 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -162,4 +162,5 @@ obj-$(CONFIG_MFD_LM3533) += lm3533-core.o lm3533-ctrlbank.o obj-$(CONFIG_VEXPRESS_CONFIG) += vexpress-config.o vexpress-sysreg.o obj-$(CONFIG_MFD_RETU) += retu-mfd.o obj-$(CONFIG_MFD_AS3711) += as3711.o +obj-$(CONFIG_MFD_AS3722) += as3722.o obj-$(CONFIG_MFD_STW481X) += stw481x.o diff --git a/drivers/mfd/as3722.c b/drivers/mfd/as3722.c new file mode 100644 index 000000000000..cd8ee593cfa8 --- /dev/null +++ b/drivers/mfd/as3722.c @@ -0,0 +1,449 @@ +/* + * Core driver for ams AS3722 PMICs + * + * Copyright (C) 2013 AMS AG + * Copyright (c) 2013, NVIDIA Corporation. All rights reserved. + * + * Author: Florian Lobmaier + * Author: Laxman Dewangan + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define AS3722_DEVICE_ID 0x0C + +static const struct resource as3722_rtc_resource[] = { + { + .name = "as3722-rtc-alarm", + .start = AS3722_IRQ_RTC_ALARM, + .end = AS3722_IRQ_RTC_ALARM, + .flags = IORESOURCE_IRQ, + }, +}; + +static const struct resource as3722_adc_resource[] = { + { + .name = "as3722-adc", + .start = AS3722_IRQ_ADC, + .end = AS3722_IRQ_ADC, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct mfd_cell as3722_devs[] = { + { + .name = "as3722-pinctrl", + }, + { + .name = "as3722-regulator", + }, + { + .name = "as3722-rtc", + .num_resources = ARRAY_SIZE(as3722_rtc_resource), + .resources = as3722_rtc_resource, + }, + { + .name = "as3722-adc", + .num_resources = ARRAY_SIZE(as3722_adc_resource), + .resources = as3722_adc_resource, + }, + { + .name = "as3722-power-off", + }, +}; + +static const struct regmap_irq as3722_irqs[] = { + /* INT1 IRQs */ + [AS3722_IRQ_LID] = { + .mask = AS3722_INTERRUPT_MASK1_LID, + }, + [AS3722_IRQ_ACOK] = { + .mask = AS3722_INTERRUPT_MASK1_ACOK, + }, + [AS3722_IRQ_ENABLE1] = { + .mask = AS3722_INTERRUPT_MASK1_ENABLE1, + }, + [AS3722_IRQ_OCCUR_ALARM_SD0] = { + .mask = AS3722_INTERRUPT_MASK1_OCURR_ALARM_SD0, + }, + [AS3722_IRQ_ONKEY_LONG_PRESS] = { + .mask = AS3722_INTERRUPT_MASK1_ONKEY_LONG, + }, + [AS3722_IRQ_ONKEY] = { + .mask = AS3722_INTERRUPT_MASK1_ONKEY, + }, + [AS3722_IRQ_OVTMP] = { + .mask = AS3722_INTERRUPT_MASK1_OVTMP, + }, + [AS3722_IRQ_LOWBAT] = { + .mask = AS3722_INTERRUPT_MASK1_LOWBAT, + }, + + /* INT2 IRQs */ + [AS3722_IRQ_SD0_LV] = { + .mask = AS3722_INTERRUPT_MASK2_SD0_LV, + .reg_offset = 1, + }, + [AS3722_IRQ_SD1_LV] = { + .mask = AS3722_INTERRUPT_MASK2_SD1_LV, + .reg_offset = 1, + }, + [AS3722_IRQ_SD2_LV] = { + .mask = AS3722_INTERRUPT_MASK2_SD2345_LV, + .reg_offset = 1, + }, + [AS3722_IRQ_PWM1_OV_PROT] = { + .mask = AS3722_INTERRUPT_MASK2_PWM1_OV_PROT, + .reg_offset = 1, + }, + [AS3722_IRQ_PWM2_OV_PROT] = { + .mask = AS3722_INTERRUPT_MASK2_PWM2_OV_PROT, + .reg_offset = 1, + }, + [AS3722_IRQ_ENABLE2] = { + .mask = AS3722_INTERRUPT_MASK2_ENABLE2, + .reg_offset = 1, + }, + [AS3722_IRQ_SD6_LV] = { + .mask = AS3722_INTERRUPT_MASK2_SD6_LV, + .reg_offset = 1, + }, + [AS3722_IRQ_RTC_REP] = { + .mask = AS3722_INTERRUPT_MASK2_RTC_REP, + .reg_offset = 1, + }, + + /* INT3 IRQs */ + [AS3722_IRQ_RTC_ALARM] = { + .mask = AS3722_INTERRUPT_MASK3_RTC_ALARM, + .reg_offset = 2, + }, + [AS3722_IRQ_GPIO1] = { + .mask = AS3722_INTERRUPT_MASK3_GPIO1, + .reg_offset = 2, + }, + [AS3722_IRQ_GPIO2] = { + .mask = AS3722_INTERRUPT_MASK3_GPIO2, + .reg_offset = 2, + }, + [AS3722_IRQ_GPIO3] = { + .mask = AS3722_INTERRUPT_MASK3_GPIO3, + .reg_offset = 2, + }, + [AS3722_IRQ_GPIO4] = { + .mask = AS3722_INTERRUPT_MASK3_GPIO4, + .reg_offset = 2, + }, + [AS3722_IRQ_GPIO5] = { + .mask = AS3722_INTERRUPT_MASK3_GPIO5, + .reg_offset = 2, + }, + [AS3722_IRQ_WATCHDOG] = { + .mask = AS3722_INTERRUPT_MASK3_WATCHDOG, + .reg_offset = 2, + }, + [AS3722_IRQ_ENABLE3] = { + .mask = AS3722_INTERRUPT_MASK3_ENABLE3, + .reg_offset = 2, + }, + + /* INT4 IRQs */ + [AS3722_IRQ_TEMP_SD0_SHUTDOWN] = { + .mask = AS3722_INTERRUPT_MASK4_TEMP_SD0_SHUTDOWN, + .reg_offset = 3, + }, + [AS3722_IRQ_TEMP_SD1_SHUTDOWN] = { + .mask = AS3722_INTERRUPT_MASK4_TEMP_SD1_SHUTDOWN, + .reg_offset = 3, + }, + [AS3722_IRQ_TEMP_SD2_SHUTDOWN] = { + .mask = AS3722_INTERRUPT_MASK4_TEMP_SD6_SHUTDOWN, + .reg_offset = 3, + }, + [AS3722_IRQ_TEMP_SD0_ALARM] = { + .mask = AS3722_INTERRUPT_MASK4_TEMP_SD0_ALARM, + .reg_offset = 3, + }, + [AS3722_IRQ_TEMP_SD1_ALARM] = { + .mask = AS3722_INTERRUPT_MASK4_TEMP_SD1_ALARM, + .reg_offset = 3, + }, + [AS3722_IRQ_TEMP_SD6_ALARM] = { + .mask = AS3722_INTERRUPT_MASK4_TEMP_SD6_ALARM, + .reg_offset = 3, + }, + [AS3722_IRQ_OCCUR_ALARM_SD6] = { + .mask = AS3722_INTERRUPT_MASK4_OCCUR_ALARM_SD6, + .reg_offset = 3, + }, + [AS3722_IRQ_ADC] = { + .mask = AS3722_INTERRUPT_MASK4_ADC, + .reg_offset = 3, + }, +}; + +static const struct regmap_irq_chip as3722_irq_chip = { + .name = "as3722", + .irqs = as3722_irqs, + .num_irqs = ARRAY_SIZE(as3722_irqs), + .num_regs = 4, + .status_base = AS3722_INTERRUPT_STATUS1_REG, + .mask_base = AS3722_INTERRUPT_MASK1_REG, +}; + +static int as3722_check_device_id(struct as3722 *as3722) +{ + u32 val; + int ret; + + /* Check that this is actually a AS3722 */ + ret = as3722_read(as3722, AS3722_ASIC_ID1_REG, &val); + if (ret < 0) { + dev_err(as3722->dev, "ASIC_ID1 read failed: %d\n", ret); + return ret; + } + + if (val != AS3722_DEVICE_ID) { + dev_err(as3722->dev, "Device is not AS3722, ID is 0x%x\n", val); + return -ENODEV; + } + + ret = as3722_read(as3722, AS3722_ASIC_ID2_REG, &val); + if (ret < 0) { + dev_err(as3722->dev, "ASIC_ID2 read failed: %d\n", ret); + return ret; + } + + dev_info(as3722->dev, "AS3722 with revision 0x%x found\n", val); + return 0; +} + +static int as3722_configure_pullups(struct as3722 *as3722) +{ + int ret; + u32 val = 0; + + if (as3722->en_intern_int_pullup) + val |= AS3722_INT_PULL_UP; + if (as3722->en_intern_i2c_pullup) + val |= AS3722_I2C_PULL_UP; + + ret = as3722_update_bits(as3722, AS3722_IOVOLTAGE_REG, + AS3722_INT_PULL_UP | AS3722_I2C_PULL_UP, val); + if (ret < 0) + dev_err(as3722->dev, "IOVOLTAGE_REG update failed: %d\n", ret); + return ret; +} + +static const struct regmap_range as3722_readable_ranges[] = { + regmap_reg_range(AS3722_SD0_VOLTAGE_REG, AS3722_SD6_VOLTAGE_REG), + regmap_reg_range(AS3722_GPIO0_CONTROL_REG, AS3722_LDO7_VOLTAGE_REG), + regmap_reg_range(AS3722_LDO9_VOLTAGE_REG, AS3722_REG_SEQU_MOD3_REG), + regmap_reg_range(AS3722_SD_PHSW_CTRL_REG, AS3722_PWM_CONTROL_H_REG), + regmap_reg_range(AS3722_WATCHDOG_TIMER_REG, AS3722_WATCHDOG_TIMER_REG), + regmap_reg_range(AS3722_WATCHDOG_SOFTWARE_SIGNAL_REG, + AS3722_BATTERY_VOLTAGE_MONITOR2_REG), + regmap_reg_range(AS3722_SD_CONTROL_REG, AS3722_PWM_VCONTROL4_REG), + regmap_reg_range(AS3722_BB_CHARGER_REG, AS3722_SRAM_REG), + regmap_reg_range(AS3722_RTC_ACCESS_REG, AS3722_RTC_ACCESS_REG), + regmap_reg_range(AS3722_RTC_STATUS_REG, AS3722_TEMP_STATUS_REG), + regmap_reg_range(AS3722_ADC0_CONTROL_REG, AS3722_ADC_CONFIGURATION_REG), + regmap_reg_range(AS3722_ASIC_ID1_REG, AS3722_ASIC_ID2_REG), + regmap_reg_range(AS3722_LOCK_REG, AS3722_LOCK_REG), +}; + +static const struct regmap_access_table as3722_readable_table = { + .yes_ranges = as3722_readable_ranges, + .n_yes_ranges = ARRAY_SIZE(as3722_readable_ranges), +}; + +static const struct regmap_range as3722_writable_ranges[] = { + regmap_reg_range(AS3722_SD0_VOLTAGE_REG, AS3722_SD6_VOLTAGE_REG), + regmap_reg_range(AS3722_GPIO0_CONTROL_REG, AS3722_LDO7_VOLTAGE_REG), + regmap_reg_range(AS3722_LDO9_VOLTAGE_REG, AS3722_GPIO_SIGNAL_OUT_REG), + regmap_reg_range(AS3722_REG_SEQU_MOD1_REG, AS3722_REG_SEQU_MOD3_REG), + regmap_reg_range(AS3722_SD_PHSW_CTRL_REG, AS3722_PWM_CONTROL_H_REG), + regmap_reg_range(AS3722_WATCHDOG_TIMER_REG, AS3722_WATCHDOG_TIMER_REG), + regmap_reg_range(AS3722_WATCHDOG_SOFTWARE_SIGNAL_REG, + AS3722_BATTERY_VOLTAGE_MONITOR2_REG), + regmap_reg_range(AS3722_SD_CONTROL_REG, AS3722_PWM_VCONTROL4_REG), + regmap_reg_range(AS3722_BB_CHARGER_REG, AS3722_SRAM_REG), + regmap_reg_range(AS3722_INTERRUPT_MASK1_REG, AS3722_TEMP_STATUS_REG), + regmap_reg_range(AS3722_ADC0_CONTROL_REG, AS3722_ADC1_CONTROL_REG), + regmap_reg_range(AS3722_ADC1_THRESHOLD_HI_MSB_REG, + AS3722_ADC_CONFIGURATION_REG), + regmap_reg_range(AS3722_LOCK_REG, AS3722_LOCK_REG), +}; + +static const struct regmap_access_table as3722_writable_table = { + .yes_ranges = as3722_writable_ranges, + .n_yes_ranges = ARRAY_SIZE(as3722_writable_ranges), +}; + +static const struct regmap_range as3722_cacheable_ranges[] = { + regmap_reg_range(AS3722_SD0_VOLTAGE_REG, AS3722_LDO11_VOLTAGE_REG), + regmap_reg_range(AS3722_SD_CONTROL_REG, AS3722_LDOCONTROL1_REG), +}; + +static const struct regmap_access_table as3722_volatile_table = { + .no_ranges = as3722_cacheable_ranges, + .n_no_ranges = ARRAY_SIZE(as3722_cacheable_ranges), +}; + +const struct regmap_config as3722_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = AS3722_MAX_REGISTER, + .cache_type = REGCACHE_RBTREE, + .rd_table = &as3722_readable_table, + .wr_table = &as3722_writable_table, + .volatile_table = &as3722_volatile_table, +}; + +static int as3722_i2c_of_probe(struct i2c_client *i2c, + struct as3722 *as3722) +{ + struct device_node *np = i2c->dev.of_node; + struct irq_data *irq_data; + + if (!np) { + dev_err(&i2c->dev, "Device Tree not found\n"); + return -EINVAL; + } + + irq_data = irq_get_irq_data(i2c->irq); + if (!irq_data) { + dev_err(&i2c->dev, "Invalid IRQ: %d\n", i2c->irq); + return -EINVAL; + } + + as3722->en_intern_int_pullup = of_property_read_bool(np, + "ams,enable-internal-int-pullup"); + as3722->en_intern_i2c_pullup = of_property_read_bool(np, + "ams,enable-internal-i2c-pullup"); + as3722->irq_flags = irqd_get_trigger_type(irq_data); + dev_dbg(&i2c->dev, "IRQ flags are 0x%08lx\n", as3722->irq_flags); + return 0; +} + +static int as3722_i2c_probe(struct i2c_client *i2c, + const struct i2c_device_id *id) +{ + struct as3722 *as3722; + unsigned long irq_flags; + int ret; + + as3722 = devm_kzalloc(&i2c->dev, sizeof(struct as3722), GFP_KERNEL); + if (!as3722) + return -ENOMEM; + + as3722->dev = &i2c->dev; + as3722->chip_irq = i2c->irq; + i2c_set_clientdata(i2c, as3722); + + ret = as3722_i2c_of_probe(i2c, as3722); + if (ret < 0) + return ret; + + as3722->regmap = devm_regmap_init_i2c(i2c, &as3722_regmap_config); + if (IS_ERR(as3722->regmap)) { + ret = PTR_ERR(as3722->regmap); + dev_err(&i2c->dev, "regmap init failed: %d\n", ret); + return ret; + } + + ret = as3722_check_device_id(as3722); + if (ret < 0) + return ret; + + irq_flags = as3722->irq_flags | IRQF_ONESHOT; + ret = regmap_add_irq_chip(as3722->regmap, as3722->chip_irq, + irq_flags, -1, &as3722_irq_chip, + &as3722->irq_data); + if (ret < 0) { + dev_err(as3722->dev, "Failed to add regmap irq: %d\n", ret); + return ret; + } + + ret = as3722_configure_pullups(as3722); + if (ret < 0) + goto scrub; + + ret = mfd_add_devices(&i2c->dev, -1, as3722_devs, + ARRAY_SIZE(as3722_devs), NULL, 0, + regmap_irq_get_domain(as3722->irq_data)); + if (ret) { + dev_err(as3722->dev, "Failed to add MFD devices: %d\n", ret); + goto scrub; + } + + dev_dbg(as3722->dev, "AS3722 core driver initialized successfully\n"); + return 0; + +scrub: + regmap_del_irq_chip(as3722->chip_irq, as3722->irq_data); + return ret; +} + +static int as3722_i2c_remove(struct i2c_client *i2c) +{ + struct as3722 *as3722 = i2c_get_clientdata(i2c); + + mfd_remove_devices(as3722->dev); + regmap_del_irq_chip(as3722->chip_irq, as3722->irq_data); + return 0; +} + +static const struct of_device_id as3722_of_match[] = { + { .compatible = "ams,as3722", }, + {}, +}; +MODULE_DEVICE_TABLE(of, as3722_of_match); + +static const struct i2c_device_id as3722_i2c_id[] = { + { "as3722", 0 }, + {}, +}; +MODULE_DEVICE_TABLE(i2c, as3722_i2c_id); + +static struct i2c_driver as3722_i2c_driver = { + .driver = { + .name = "as3722", + .owner = THIS_MODULE, + .of_match_table = as3722_of_match, + }, + .probe = as3722_i2c_probe, + .remove = as3722_i2c_remove, + .id_table = as3722_i2c_id, +}; + +module_i2c_driver(as3722_i2c_driver); + +MODULE_DESCRIPTION("I2C support for AS3722 PMICs"); +MODULE_AUTHOR("Florian Lobmaier "); +MODULE_AUTHOR("Laxman Dewangan "); +MODULE_LICENSE("GPL"); diff --git a/include/dt-bindings/mfd/as3722.h b/include/dt-bindings/mfd/as3722.h new file mode 100644 index 000000000000..0e692562d77b --- /dev/null +++ b/include/dt-bindings/mfd/as3722.h @@ -0,0 +1,52 @@ +/* + * This header provides macros for ams AS3722 device bindings. + * + * Copyright (c) 2013, NVIDIA Corporation. + * + * Author: Laxman Dewangan + * + */ + +#ifndef __DT_BINDINGS_AS3722_H__ +#define __DT_BINDINGS_AS3722_H__ + +/* External control pins */ +#define AS3722_EXT_CONTROL_PIN_ENABLE1 1 +#define AS3722_EXT_CONTROL_PIN_ENABLE2 2 +#define AS3722_EXT_CONTROL_PIN_ENABLE2 3 + +/* Interrupt numbers for AS3722 */ +#define AS3722_IRQ_LID 0 +#define AS3722_IRQ_ACOK 1 +#define AS3722_IRQ_ENABLE1 2 +#define AS3722_IRQ_OCCUR_ALARM_SD0 3 +#define AS3722_IRQ_ONKEY_LONG_PRESS 4 +#define AS3722_IRQ_ONKEY 5 +#define AS3722_IRQ_OVTMP 6 +#define AS3722_IRQ_LOWBAT 7 +#define AS3722_IRQ_SD0_LV 8 +#define AS3722_IRQ_SD1_LV 9 +#define AS3722_IRQ_SD2_LV 10 +#define AS3722_IRQ_PWM1_OV_PROT 11 +#define AS3722_IRQ_PWM2_OV_PROT 12 +#define AS3722_IRQ_ENABLE2 13 +#define AS3722_IRQ_SD6_LV 14 +#define AS3722_IRQ_RTC_REP 15 +#define AS3722_IRQ_RTC_ALARM 16 +#define AS3722_IRQ_GPIO1 17 +#define AS3722_IRQ_GPIO2 18 +#define AS3722_IRQ_GPIO3 19 +#define AS3722_IRQ_GPIO4 20 +#define AS3722_IRQ_GPIO5 21 +#define AS3722_IRQ_WATCHDOG 22 +#define AS3722_IRQ_ENABLE3 23 +#define AS3722_IRQ_TEMP_SD0_SHUTDOWN 24 +#define AS3722_IRQ_TEMP_SD1_SHUTDOWN 25 +#define AS3722_IRQ_TEMP_SD2_SHUTDOWN 26 +#define AS3722_IRQ_TEMP_SD0_ALARM 27 +#define AS3722_IRQ_TEMP_SD1_ALARM 28 +#define AS3722_IRQ_TEMP_SD6_ALARM 29 +#define AS3722_IRQ_OCCUR_ALARM_SD6 30 +#define AS3722_IRQ_ADC 31 + +#endif /* __DT_BINDINGS_AS3722_H__ */ diff --git a/include/linux/mfd/as3722.h b/include/linux/mfd/as3722.h new file mode 100644 index 000000000000..16bf8a0dcd97 --- /dev/null +++ b/include/linux/mfd/as3722.h @@ -0,0 +1,423 @@ +/* + * as3722 definitions + * + * Copyright (C) 2013 ams + * Copyright (c) 2013, NVIDIA Corporation. All rights reserved. + * + * Author: Florian Lobmaier + * Author: Laxman Dewangan + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +#ifndef __LINUX_MFD_AS3722_H__ +#define __LINUX_MFD_AS3722_H__ + +#include + +/* AS3722 registers */ +#define AS3722_SD0_VOLTAGE_REG 0x00 +#define AS3722_SD1_VOLTAGE_REG 0x01 +#define AS3722_SD2_VOLTAGE_REG 0x02 +#define AS3722_SD3_VOLTAGE_REG 0x03 +#define AS3722_SD4_VOLTAGE_REG 0x04 +#define AS3722_SD5_VOLTAGE_REG 0x05 +#define AS3722_SD6_VOLTAGE_REG 0x06 +#define AS3722_GPIO0_CONTROL_REG 0x08 +#define AS3722_GPIO1_CONTROL_REG 0x09 +#define AS3722_GPIO2_CONTROL_REG 0x0A +#define AS3722_GPIO3_CONTROL_REG 0x0B +#define AS3722_GPIO4_CONTROL_REG 0x0C +#define AS3722_GPIO5_CONTROL_REG 0x0D +#define AS3722_GPIO6_CONTROL_REG 0x0E +#define AS3722_GPIO7_CONTROL_REG 0x0F +#define AS3722_LDO0_VOLTAGE_REG 0x10 +#define AS3722_LDO1_VOLTAGE_REG 0x11 +#define AS3722_LDO2_VOLTAGE_REG 0x12 +#define AS3722_LDO3_VOLTAGE_REG 0x13 +#define AS3722_LDO4_VOLTAGE_REG 0x14 +#define AS3722_LDO5_VOLTAGE_REG 0x15 +#define AS3722_LDO6_VOLTAGE_REG 0x16 +#define AS3722_LDO7_VOLTAGE_REG 0x17 +#define AS3722_LDO9_VOLTAGE_REG 0x19 +#define AS3722_LDO10_VOLTAGE_REG 0x1A +#define AS3722_LDO11_VOLTAGE_REG 0x1B +#define AS3722_GPIO_DEB1_REG 0x1E +#define AS3722_GPIO_DEB2_REG 0x1F +#define AS3722_GPIO_SIGNAL_OUT_REG 0x20 +#define AS3722_GPIO_SIGNAL_IN_REG 0x21 +#define AS3722_REG_SEQU_MOD1_REG 0x22 +#define AS3722_REG_SEQU_MOD2_REG 0x23 +#define AS3722_REG_SEQU_MOD3_REG 0x24 +#define AS3722_SD_PHSW_CTRL_REG 0x27 +#define AS3722_SD_PHSW_STATUS 0x28 +#define AS3722_SD0_CONTROL_REG 0x29 +#define AS3722_SD1_CONTROL_REG 0x2A +#define AS3722_SDmph_CONTROL_REG 0x2B +#define AS3722_SD23_CONTROL_REG 0x2C +#define AS3722_SD4_CONTROL_REG 0x2D +#define AS3722_SD5_CONTROL_REG 0x2E +#define AS3722_SD6_CONTROL_REG 0x2F +#define AS3722_SD_DVM_REG 0x30 +#define AS3722_RESET_REASON_REG 0x31 +#define AS3722_BATTERY_VOLTAGE_MONITOR_REG 0x32 +#define AS3722_STARTUP_CONTROL_REG 0x33 +#define AS3722_RESET_TIMER_REG 0x34 +#define AS3722_REFERENCE_CONTROL_REG 0x35 +#define AS3722_RESET_CONTROL_REG 0x36 +#define AS3722_OVER_TEMP_CONTROL_REG 0x37 +#define AS3722_WATCHDOG_CONTROL_REG 0x38 +#define AS3722_REG_STANDBY_MOD1_REG 0x39 +#define AS3722_REG_STANDBY_MOD2_REG 0x3A +#define AS3722_REG_STANDBY_MOD3_REG 0x3B +#define AS3722_ENABLE_CTRL1_REG 0x3C +#define AS3722_ENABLE_CTRL2_REG 0x3D +#define AS3722_ENABLE_CTRL3_REG 0x3E +#define AS3722_ENABLE_CTRL4_REG 0x3F +#define AS3722_ENABLE_CTRL5_REG 0x40 +#define AS3722_PWM_CONTROL_L_REG 0x41 +#define AS3722_PWM_CONTROL_H_REG 0x42 +#define AS3722_WATCHDOG_TIMER_REG 0x46 +#define AS3722_WATCHDOG_SOFTWARE_SIGNAL_REG 0x48 +#define AS3722_IOVOLTAGE_REG 0x49 +#define AS3722_BATTERY_VOLTAGE_MONITOR2_REG 0x4A +#define AS3722_SD_CONTROL_REG 0x4D +#define AS3722_LDOCONTROL0_REG 0x4E +#define AS3722_LDOCONTROL1_REG 0x4F +#define AS3722_SD0_PROTECT_REG 0x50 +#define AS3722_SD6_PROTECT_REG 0x51 +#define AS3722_PWM_VCONTROL1_REG 0x52 +#define AS3722_PWM_VCONTROL2_REG 0x53 +#define AS3722_PWM_VCONTROL3_REG 0x54 +#define AS3722_PWM_VCONTROL4_REG 0x55 +#define AS3722_BB_CHARGER_REG 0x57 +#define AS3722_CTRL_SEQU1_REG 0x58 +#define AS3722_CTRL_SEQU2_REG 0x59 +#define AS3722_OVCURRENT_REG 0x5A +#define AS3722_OVCURRENT_DEB_REG 0x5B +#define AS3722_SDLV_DEB_REG 0x5C +#define AS3722_OC_PG_CTRL_REG 0x5D +#define AS3722_OC_PG_CTRL2_REG 0x5E +#define AS3722_CTRL_STATUS 0x5F +#define AS3722_RTC_CONTROL_REG 0x60 +#define AS3722_RTC_SECOND_REG 0x61 +#define AS3722_RTC_MINUTE_REG 0x62 +#define AS3722_RTC_HOUR_REG 0x63 +#define AS3722_RTC_DAY_REG 0x64 +#define AS3722_RTC_MONTH_REG 0x65 +#define AS3722_RTC_YEAR_REG 0x66 +#define AS3722_RTC_ALARM_SECOND_REG 0x67 +#define AS3722_RTC_ALARM_MINUTE_REG 0x68 +#define AS3722_RTC_ALARM_HOUR_REG 0x69 +#define AS3722_RTC_ALARM_DAY_REG 0x6A +#define AS3722_RTC_ALARM_MONTH_REG 0x6B +#define AS3722_RTC_ALARM_YEAR_REG 0x6C +#define AS3722_SRAM_REG 0x6D +#define AS3722_RTC_ACCESS_REG 0x6F +#define AS3722_RTC_STATUS_REG 0x73 +#define AS3722_INTERRUPT_MASK1_REG 0x74 +#define AS3722_INTERRUPT_MASK2_REG 0x75 +#define AS3722_INTERRUPT_MASK3_REG 0x76 +#define AS3722_INTERRUPT_MASK4_REG 0x77 +#define AS3722_INTERRUPT_STATUS1_REG 0x78 +#define AS3722_INTERRUPT_STATUS2_REG 0x79 +#define AS3722_INTERRUPT_STATUS3_REG 0x7A +#define AS3722_INTERRUPT_STATUS4_REG 0x7B +#define AS3722_TEMP_STATUS_REG 0x7D +#define AS3722_ADC0_CONTROL_REG 0x80 +#define AS3722_ADC1_CONTROL_REG 0x81 +#define AS3722_ADC0_MSB_RESULT_REG 0x82 +#define AS3722_ADC0_LSB_RESULT_REG 0x83 +#define AS3722_ADC1_MSB_RESULT_REG 0x84 +#define AS3722_ADC1_LSB_RESULT_REG 0x85 +#define AS3722_ADC1_THRESHOLD_HI_MSB_REG 0x86 +#define AS3722_ADC1_THRESHOLD_HI_LSB_REG 0x87 +#define AS3722_ADC1_THRESHOLD_LO_MSB_REG 0x88 +#define AS3722_ADC1_THRESHOLD_LO_LSB_REG 0x89 +#define AS3722_ADC_CONFIGURATION_REG 0x8A +#define AS3722_ASIC_ID1_REG 0x90 +#define AS3722_ASIC_ID2_REG 0x91 +#define AS3722_LOCK_REG 0x9E +#define AS3722_MAX_REGISTER 0xF4 + +#define AS3722_SD0_EXT_ENABLE_MASK 0x03 +#define AS3722_SD1_EXT_ENABLE_MASK 0x0C +#define AS3722_SD2_EXT_ENABLE_MASK 0x30 +#define AS3722_SD3_EXT_ENABLE_MASK 0xC0 +#define AS3722_SD4_EXT_ENABLE_MASK 0x03 +#define AS3722_SD5_EXT_ENABLE_MASK 0x0C +#define AS3722_SD6_EXT_ENABLE_MASK 0x30 +#define AS3722_LDO0_EXT_ENABLE_MASK 0x03 +#define AS3722_LDO1_EXT_ENABLE_MASK 0x0C +#define AS3722_LDO2_EXT_ENABLE_MASK 0x30 +#define AS3722_LDO3_EXT_ENABLE_MASK 0xC0 +#define AS3722_LDO4_EXT_ENABLE_MASK 0x03 +#define AS3722_LDO5_EXT_ENABLE_MASK 0x0C +#define AS3722_LDO6_EXT_ENABLE_MASK 0x30 +#define AS3722_LDO7_EXT_ENABLE_MASK 0xC0 +#define AS3722_LDO9_EXT_ENABLE_MASK 0x0C +#define AS3722_LDO10_EXT_ENABLE_MASK 0x30 +#define AS3722_LDO11_EXT_ENABLE_MASK 0xC0 + +#define AS3722_OVCURRENT_SD0_ALARM_MASK 0x07 +#define AS3722_OVCURRENT_SD0_ALARM_SHIFT 0x01 +#define AS3722_OVCURRENT_SD0_TRIP_MASK 0x18 +#define AS3722_OVCURRENT_SD0_TRIP_SHIFT 0x03 +#define AS3722_OVCURRENT_SD1_TRIP_MASK 0x60 +#define AS3722_OVCURRENT_SD1_TRIP_SHIFT 0x05 + +#define AS3722_OVCURRENT_SD6_ALARM_MASK 0x07 +#define AS3722_OVCURRENT_SD6_ALARM_SHIFT 0x01 +#define AS3722_OVCURRENT_SD6_TRIP_MASK 0x18 +#define AS3722_OVCURRENT_SD6_TRIP_SHIFT 0x03 + +/* AS3722 register bits and bit masks */ +#define AS3722_LDO_ILIMIT_MASK BIT(7) +#define AS3722_LDO_ILIMIT_BIT BIT(7) +#define AS3722_LDO0_VSEL_MASK 0x1F +#define AS3722_LDO0_VSEL_MIN 0x01 +#define AS3722_LDO0_VSEL_MAX 0x12 +#define AS3722_LDO0_NUM_VOLT 0x12 +#define AS3722_LDO3_VSEL_MASK 0x3F +#define AS3722_LDO3_VSEL_MIN 0x01 +#define AS3722_LDO3_VSEL_MAX 0x2D +#define AS3722_LDO3_NUM_VOLT 0x2D +#define AS3722_LDO_VSEL_MASK 0x7F +#define AS3722_LDO_VSEL_MIN 0x01 +#define AS3722_LDO_VSEL_MAX 0x7F +#define AS3722_LDO_VSEL_DNU_MIN 0x25 +#define AS3722_LDO_VSEL_DNU_MAX 0x3F +#define AS3722_LDO_NUM_VOLT 0x80 + +#define AS3722_LDO0_CTRL BIT(0) +#define AS3722_LDO1_CTRL BIT(1) +#define AS3722_LDO2_CTRL BIT(2) +#define AS3722_LDO3_CTRL BIT(3) +#define AS3722_LDO4_CTRL BIT(4) +#define AS3722_LDO5_CTRL BIT(5) +#define AS3722_LDO6_CTRL BIT(6) +#define AS3722_LDO7_CTRL BIT(7) +#define AS3722_LDO9_CTRL BIT(1) +#define AS3722_LDO10_CTRL BIT(2) +#define AS3722_LDO11_CTRL BIT(3) + +#define AS3722_LDO3_MODE_MASK (3 << 6) +#define AS3722_LDO3_MODE_VAL(n) (((n) & 0x3) << 6) +#define AS3722_LDO3_MODE_PMOS AS3722_LDO3_MODE_VAL(0) +#define AS3722_LDO3_MODE_PMOS_TRACKING AS3722_LDO3_MODE_VAL(1) +#define AS3722_LDO3_MODE_NMOS AS3722_LDO3_MODE_VAL(2) +#define AS3722_LDO3_MODE_SWITCH AS3722_LDO3_MODE_VAL(3) + +#define AS3722_SD_VSEL_MASK 0x7F +#define AS3722_SD0_VSEL_MIN 0x01 +#define AS3722_SD0_VSEL_MAX 0x5A +#define AS3722_SD2_VSEL_MIN 0x01 +#define AS3722_SD2_VSEL_MAX 0x7F + +#define AS3722_SDn_CTRL(n) BIT(n) + +#define AS3722_SD0_MODE_FAST BIT(4) +#define AS3722_SD1_MODE_FAST BIT(4) +#define AS3722_SD2_MODE_FAST BIT(2) +#define AS3722_SD3_MODE_FAST BIT(6) +#define AS3722_SD4_MODE_FAST BIT(2) +#define AS3722_SD5_MODE_FAST BIT(2) +#define AS3722_SD6_MODE_FAST BIT(4) + +#define AS3722_POWER_OFF BIT(1) + +#define AS3722_INTERRUPT_MASK1_LID BIT(0) +#define AS3722_INTERRUPT_MASK1_ACOK BIT(1) +#define AS3722_INTERRUPT_MASK1_ENABLE1 BIT(2) +#define AS3722_INTERRUPT_MASK1_OCURR_ALARM_SD0 BIT(3) +#define AS3722_INTERRUPT_MASK1_ONKEY_LONG BIT(4) +#define AS3722_INTERRUPT_MASK1_ONKEY BIT(5) +#define AS3722_INTERRUPT_MASK1_OVTMP BIT(6) +#define AS3722_INTERRUPT_MASK1_LOWBAT BIT(7) + +#define AS3722_INTERRUPT_MASK2_SD0_LV BIT(0) +#define AS3722_INTERRUPT_MASK2_SD1_LV BIT(1) +#define AS3722_INTERRUPT_MASK2_SD2345_LV BIT(2) +#define AS3722_INTERRUPT_MASK2_PWM1_OV_PROT BIT(3) +#define AS3722_INTERRUPT_MASK2_PWM2_OV_PROT BIT(4) +#define AS3722_INTERRUPT_MASK2_ENABLE2 BIT(5) +#define AS3722_INTERRUPT_MASK2_SD6_LV BIT(6) +#define AS3722_INTERRUPT_MASK2_RTC_REP BIT(7) + +#define AS3722_INTERRUPT_MASK3_RTC_ALARM BIT(0) +#define AS3722_INTERRUPT_MASK3_GPIO1 BIT(1) +#define AS3722_INTERRUPT_MASK3_GPIO2 BIT(2) +#define AS3722_INTERRUPT_MASK3_GPIO3 BIT(3) +#define AS3722_INTERRUPT_MASK3_GPIO4 BIT(4) +#define AS3722_INTERRUPT_MASK3_GPIO5 BIT(5) +#define AS3722_INTERRUPT_MASK3_WATCHDOG BIT(6) +#define AS3722_INTERRUPT_MASK3_ENABLE3 BIT(7) + +#define AS3722_INTERRUPT_MASK4_TEMP_SD0_SHUTDOWN BIT(0) +#define AS3722_INTERRUPT_MASK4_TEMP_SD1_SHUTDOWN BIT(1) +#define AS3722_INTERRUPT_MASK4_TEMP_SD6_SHUTDOWN BIT(2) +#define AS3722_INTERRUPT_MASK4_TEMP_SD0_ALARM BIT(3) +#define AS3722_INTERRUPT_MASK4_TEMP_SD1_ALARM BIT(4) +#define AS3722_INTERRUPT_MASK4_TEMP_SD6_ALARM BIT(5) +#define AS3722_INTERRUPT_MASK4_OCCUR_ALARM_SD6 BIT(6) +#define AS3722_INTERRUPT_MASK4_ADC BIT(7) + +#define AS3722_ADC1_INTERVAL_TIME BIT(0) +#define AS3722_ADC1_INT_MODE_ON BIT(1) +#define AS3722_ADC_BUF_ON BIT(2) +#define AS3722_ADC1_LOW_VOLTAGE_RANGE BIT(5) +#define AS3722_ADC1_INTEVAL_SCAN BIT(6) +#define AS3722_ADC1_INT_MASK BIT(7) + +#define AS3722_ADC_MSB_VAL_MASK 0x7F +#define AS3722_ADC_LSB_VAL_MASK 0x07 + +#define AS3722_ADC0_CONV_START BIT(7) +#define AS3722_ADC0_CONV_NOTREADY BIT(7) +#define AS3722_ADC0_SOURCE_SELECT_MASK 0x1F + +#define AS3722_ADC1_CONV_START BIT(7) +#define AS3722_ADC1_CONV_NOTREADY BIT(7) +#define AS3722_ADC1_SOURCE_SELECT_MASK 0x1F + +/* GPIO modes */ +#define AS3722_GPIO_MODE_MASK 0x07 +#define AS3722_GPIO_MODE_INPUT 0x00 +#define AS3722_GPIO_MODE_OUTPUT_VDDH 0x01 +#define AS3722_GPIO_MODE_IO_OPEN_DRAIN 0x02 +#define AS3722_GPIO_MODE_ADC_IN 0x03 +#define AS3722_GPIO_MODE_INPUT_PULL_UP 0x04 +#define AS3722_GPIO_MODE_INPUT_PULL_DOWN 0x05 +#define AS3722_GPIO_MODE_IO_OPEN_DRAIN_PULL_UP 0x06 +#define AS3722_GPIO_MODE_OUTPUT_VDDL 0x07 +#define AS3722_GPIO_MODE_VAL(n) ((n) & AS3722_GPIO_MODE_MASK) + +#define AS3722_GPIO_INV BIT(7) +#define AS3722_GPIO_IOSF_MASK 0x78 +#define AS3722_GPIO_IOSF_VAL(n) (((n) & 0xF) << 3) +#define AS3722_GPIO_IOSF_NORMAL AS3722_GPIO_IOSF_VAL(0) +#define AS3722_GPIO_IOSF_INTERRUPT_OUT AS3722_GPIO_IOSF_VAL(1) +#define AS3722_GPIO_IOSF_VSUP_LOW_OUT AS3722_GPIO_IOSF_VAL(2) +#define AS3722_GPIO_IOSF_GPIO_INTERRUPT_IN AS3722_GPIO_IOSF_VAL(3) +#define AS3722_GPIO_IOSF_ISINK_PWM_IN AS3722_GPIO_IOSF_VAL(4) +#define AS3722_GPIO_IOSF_VOLTAGE_STBY AS3722_GPIO_IOSF_VAL(5) +#define AS3722_GPIO_IOSF_PWR_GOOD_OUT AS3722_GPIO_IOSF_VAL(7) +#define AS3722_GPIO_IOSF_Q32K_OUT AS3722_GPIO_IOSF_VAL(8) +#define AS3722_GPIO_IOSF_WATCHDOG_IN AS3722_GPIO_IOSF_VAL(9) +#define AS3722_GPIO_IOSF_SOFT_RESET_IN AS3722_GPIO_IOSF_VAL(11) +#define AS3722_GPIO_IOSF_PWM_OUT AS3722_GPIO_IOSF_VAL(12) +#define AS3722_GPIO_IOSF_VSUP_LOW_DEB_OUT AS3722_GPIO_IOSF_VAL(13) +#define AS3722_GPIO_IOSF_SD6_LOW_VOLT_LOW AS3722_GPIO_IOSF_VAL(14) + +#define AS3722_GPIOn_SIGNAL(n) BIT(n) +#define AS3722_GPIOn_CONTROL_REG(n) (AS3722_GPIO0_CONTROL_REG + n) +#define AS3722_I2C_PULL_UP BIT(4) +#define AS3722_INT_PULL_UP BIT(5) + +#define AS3722_RTC_REP_WAKEUP_EN BIT(0) +#define AS3722_RTC_ALARM_WAKEUP_EN BIT(1) +#define AS3722_RTC_ON BIT(2) +#define AS3722_RTC_IRQMODE BIT(3) +#define AS3722_RTC_CLK32K_OUT_EN BIT(5) + +#define AS3722_WATCHDOG_TIMER_MAX 0x7F +#define AS3722_WATCHDOG_ON BIT(0) +#define AS3722_WATCHDOG_SW_SIG BIT(0) + +#define AS3722_EXT_CONTROL_ENABLE1 0x1 +#define AS3722_EXT_CONTROL_ENABLE2 0x2 +#define AS3722_EXT_CONTROL_ENABLE3 0x3 + +/* Interrupt IDs */ +enum as3722_irq { + AS3722_IRQ_LID, + AS3722_IRQ_ACOK, + AS3722_IRQ_ENABLE1, + AS3722_IRQ_OCCUR_ALARM_SD0, + AS3722_IRQ_ONKEY_LONG_PRESS, + AS3722_IRQ_ONKEY, + AS3722_IRQ_OVTMP, + AS3722_IRQ_LOWBAT, + AS3722_IRQ_SD0_LV, + AS3722_IRQ_SD1_LV, + AS3722_IRQ_SD2_LV, + AS3722_IRQ_PWM1_OV_PROT, + AS3722_IRQ_PWM2_OV_PROT, + AS3722_IRQ_ENABLE2, + AS3722_IRQ_SD6_LV, + AS3722_IRQ_RTC_REP, + AS3722_IRQ_RTC_ALARM, + AS3722_IRQ_GPIO1, + AS3722_IRQ_GPIO2, + AS3722_IRQ_GPIO3, + AS3722_IRQ_GPIO4, + AS3722_IRQ_GPIO5, + AS3722_IRQ_WATCHDOG, + AS3722_IRQ_ENABLE3, + AS3722_IRQ_TEMP_SD0_SHUTDOWN, + AS3722_IRQ_TEMP_SD1_SHUTDOWN, + AS3722_IRQ_TEMP_SD2_SHUTDOWN, + AS3722_IRQ_TEMP_SD0_ALARM, + AS3722_IRQ_TEMP_SD1_ALARM, + AS3722_IRQ_TEMP_SD6_ALARM, + AS3722_IRQ_OCCUR_ALARM_SD6, + AS3722_IRQ_ADC, + AS3722_IRQ_MAX, +}; + +struct as3722 { + struct device *dev; + struct regmap *regmap; + int chip_irq; + unsigned long irq_flags; + bool en_intern_int_pullup; + bool en_intern_i2c_pullup; + struct regmap_irq_chip_data *irq_data; +}; + +static inline int as3722_read(struct as3722 *as3722, u32 reg, u32 *dest) +{ + return regmap_read(as3722->regmap, reg, dest); +} + +static inline int as3722_write(struct as3722 *as3722, u32 reg, u32 value) +{ + return regmap_write(as3722->regmap, reg, value); +} + +static inline int as3722_block_read(struct as3722 *as3722, u32 reg, + int count, u8 *buf) +{ + return regmap_bulk_read(as3722->regmap, reg, buf, count); +} + +static inline int as3722_block_write(struct as3722 *as3722, u32 reg, + int count, u8 *data) +{ + return regmap_bulk_write(as3722->regmap, reg, data, count); +} + +static inline int as3722_update_bits(struct as3722 *as3722, u32 reg, + u32 mask, u8 val) +{ + return regmap_update_bits(as3722->regmap, reg, mask, val); +} + +static inline int as3722_irq_get_virq(struct as3722 *as3722, int irq) +{ + return regmap_irq_get_virq(as3722->irq_data, irq); +} +#endif /* __LINUX_MFD_AS3722_H__ */ -- cgit v1.2.3-71-gd317 From df73de9b0d412915384396637bf67ef9208161e9 Mon Sep 17 00:00:00 2001 From: Peter Chen Date: Tue, 22 Oct 2013 16:46:25 +0800 Subject: mfd: syscon: Return -ENOSYS if CONFIG_MFD_SYSCON is not enabled Some platforms may not define CONFIG_MFD_SYSCON (or haven't syscon), it can fix build error for these platforms. Signed-off-by: Peter Chen Signed-off-by: Lee Jones --- include/linux/mfd/syscon.h | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) (limited to 'include/linux/mfd') diff --git a/include/linux/mfd/syscon.h b/include/linux/mfd/syscon.h index b473577f36db..8789fa3c7fd9 100644 --- a/include/linux/mfd/syscon.h +++ b/include/linux/mfd/syscon.h @@ -17,10 +17,35 @@ struct device_node; +#ifdef CONFIG_MFD_SYSCON extern struct regmap *syscon_node_to_regmap(struct device_node *np); extern struct regmap *syscon_regmap_lookup_by_compatible(const char *s); extern struct regmap *syscon_regmap_lookup_by_pdevname(const char *s); extern struct regmap *syscon_regmap_lookup_by_phandle( struct device_node *np, const char *property); +#else +static inline struct regmap *syscon_node_to_regmap(struct device_node *np) +{ + return ERR_PTR(-ENOSYS); +} + +static inline struct regmap *syscon_regmap_lookup_by_compatible(const char *s) +{ + return ERR_PTR(-ENOSYS); +} + +static inline struct regmap *syscon_regmap_lookup_by_pdevname(const char *s) +{ + return ERR_PTR(-ENOSYS); +} + +static inline struct regmap *syscon_regmap_lookup_by_phandle( + struct device_node *np, + const char *property) +{ + return ERR_PTR(-ENOSYS); +} +#endif + #endif /* __LINUX_MFD_SYSCON_H__ */ -- cgit v1.2.3-71-gd317 From 03e361b25ee8dfb1fd9b890072c23c4aae01c6c7 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 29 Oct 2013 10:03:04 +0100 Subject: mfd: Stop setting refcounting pointers in original mfd_cell arrays Commit 1e29af62f2b285bd18685da93c3ce8c33ca2d1db ("mfd: Add refcounting support to mfd_cells") had to drop the "const" keyword on the "cell" parameter of mfd_add_devices(), as it added the refcounting pointers to the objects of the passed mfd_cell array itself. However, the mfd core code operates on copies of the mfd_cell objects, so there's no need to modify the originally passed objects. Hence, move the setting of the refcounting pointers from mfd_add_devices() to mfd_platform_add_cell(), where the copy of the mfd_cell objects is made. mfd_clone_cell() can just pass (a copy of) the original usage_count pointer. This allows to make the "cell" parameter of mfd_add_devices() "const" again, and avoids future race conditions when registering multiple instances of the same device in parallel. Signed-off-by: Geert Uytterhoeven Signed-off-by: Lee Jones --- drivers/mfd/mfd-core.c | 17 +++++++++-------- include/linux/mfd/core.h | 2 +- 2 files changed, 10 insertions(+), 9 deletions(-) (limited to 'include/linux/mfd') diff --git a/drivers/mfd/mfd-core.c b/drivers/mfd/mfd-core.c index f421586f29fb..8736f4539bc0 100644 --- a/drivers/mfd/mfd-core.c +++ b/drivers/mfd/mfd-core.c @@ -63,7 +63,8 @@ int mfd_cell_disable(struct platform_device *pdev) EXPORT_SYMBOL(mfd_cell_disable); static int mfd_platform_add_cell(struct platform_device *pdev, - const struct mfd_cell *cell) + const struct mfd_cell *cell, + atomic_t *usage_count) { if (!cell) return 0; @@ -72,11 +73,12 @@ static int mfd_platform_add_cell(struct platform_device *pdev, if (!pdev->mfd_cell) return -ENOMEM; + pdev->mfd_cell->usage_count = usage_count; return 0; } static int mfd_add_device(struct device *parent, int id, - const struct mfd_cell *cell, + const struct mfd_cell *cell, atomic_t *usage_count, struct resource *mem_base, int irq_base, struct irq_domain *domain) { @@ -115,7 +117,7 @@ static int mfd_add_device(struct device *parent, int id, goto fail_res; } - ret = mfd_platform_add_cell(pdev, cell); + ret = mfd_platform_add_cell(pdev, cell, usage_count); if (ret) goto fail_res; @@ -180,7 +182,7 @@ fail_alloc: } int mfd_add_devices(struct device *parent, int id, - struct mfd_cell *cells, int n_devs, + const struct mfd_cell *cells, int n_devs, struct resource *mem_base, int irq_base, struct irq_domain *domain) { @@ -195,8 +197,7 @@ int mfd_add_devices(struct device *parent, int id, for (i = 0; i < n_devs; i++) { atomic_set(&cnts[i], 0); - cells[i].usage_count = &cnts[i]; - ret = mfd_add_device(parent, id, cells + i, mem_base, + ret = mfd_add_device(parent, id, cells + i, cnts + i, mem_base, irq_base, domain); if (ret) break; @@ -259,8 +260,8 @@ int mfd_clone_cell(const char *cell, const char **clones, size_t n_clones) for (i = 0; i < n_clones; i++) { cell_entry.name = clones[i]; /* don't give up if a single call fails; just report error */ - if (mfd_add_device(pdev->dev.parent, -1, &cell_entry, NULL, 0, - NULL)) + if (mfd_add_device(pdev->dev.parent, -1, &cell_entry, + cell_entry.usage_count, NULL, 0, NULL)) dev_err(dev, "failed to create platform device '%s'\n", clones[i]); } diff --git a/include/linux/mfd/core.h b/include/linux/mfd/core.h index cebe97ee98b8..60ced604664f 100644 --- a/include/linux/mfd/core.h +++ b/include/linux/mfd/core.h @@ -98,7 +98,7 @@ static inline const struct mfd_cell *mfd_get_cell(struct platform_device *pdev) } extern int mfd_add_devices(struct device *parent, int id, - struct mfd_cell *cells, int n_devs, + const struct mfd_cell *cells, int n_devs, struct resource *mem_base, int irq_base, struct irq_domain *irq_domain); -- cgit v1.2.3-71-gd317 From 5bccae6ec4587044779f0b8e6fcb8f87db4181f0 Mon Sep 17 00:00:00 2001 From: Sangbeom Kim Date: Tue, 12 Nov 2013 15:11:04 -0800 Subject: rtc: s5m-rtc: add real-time clock driver for s5m8767 Add real-time clock driver for s5m8767. Signed-off-by: Sangbeom Kim Signed-off-by: Sachin Kamat Cc: Todd Broch Cc: Mark Brown Acked-by: Lee Jones [mfd parts] Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/rtc/Kconfig | 10 + drivers/rtc/Makefile | 1 + drivers/rtc/rtc-s5m.c | 635 +++++++++++++++++++++++++++++++++++++++ include/linux/mfd/samsung/core.h | 1 + include/linux/mfd/samsung/rtc.h | 11 + 5 files changed, 658 insertions(+) create mode 100644 drivers/rtc/rtc-s5m.c (limited to 'include/linux/mfd') diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index 9654aa3c05cb..4f48b9a26aa0 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig @@ -497,6 +497,16 @@ config RTC_DRV_RV3029C2 This driver can also be built as a module. If so, the module will be called rtc-rv3029c2. +config RTC_DRV_S5M + tristate "Samsung S5M series" + depends on MFD_SEC_CORE + help + If you say yes here you will get support for the + RTC of Samsung S5M PMIC series. + + This driver can also be built as a module. If so, the module + will be called rtc-s5m. + endif # I2C comment "SPI RTC drivers" diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile index 2dff3d2009b5..9312e7965365 100644 --- a/drivers/rtc/Makefile +++ b/drivers/rtc/Makefile @@ -107,6 +107,7 @@ obj-$(CONFIG_RTC_DRV_RX8025) += rtc-rx8025.o obj-$(CONFIG_RTC_DRV_RX8581) += rtc-rx8581.o obj-$(CONFIG_RTC_DRV_S35390A) += rtc-s35390a.o obj-$(CONFIG_RTC_DRV_S3C) += rtc-s3c.o +obj-$(CONFIG_RTC_DRV_S5M) += rtc-s5m.o obj-$(CONFIG_RTC_DRV_SA1100) += rtc-sa1100.o obj-$(CONFIG_RTC_DRV_SH) += rtc-sh.o obj-$(CONFIG_RTC_DRV_SNVS) += rtc-snvs.o diff --git a/drivers/rtc/rtc-s5m.c b/drivers/rtc/rtc-s5m.c new file mode 100644 index 000000000000..b7fd02bc0a14 --- /dev/null +++ b/drivers/rtc/rtc-s5m.c @@ -0,0 +1,635 @@ +/* + * Copyright (c) 2013 Samsung Electronics Co., Ltd + * http://www.samsung.com + * + * Copyright (C) 2013 Google, Inc + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct s5m_rtc_info { + struct device *dev; + struct sec_pmic_dev *s5m87xx; + struct regmap *rtc; + struct rtc_device *rtc_dev; + int irq; + int device_type; + int rtc_24hr_mode; + bool wtsr_smpl; +}; + +static void s5m8767_data_to_tm(u8 *data, struct rtc_time *tm, + int rtc_24hr_mode) +{ + tm->tm_sec = data[RTC_SEC] & 0x7f; + tm->tm_min = data[RTC_MIN] & 0x7f; + if (rtc_24hr_mode) { + tm->tm_hour = data[RTC_HOUR] & 0x1f; + } else { + tm->tm_hour = data[RTC_HOUR] & 0x0f; + if (data[RTC_HOUR] & HOUR_PM_MASK) + tm->tm_hour += 12; + } + + tm->tm_wday = ffs(data[RTC_WEEKDAY] & 0x7f); + tm->tm_mday = data[RTC_DATE] & 0x1f; + tm->tm_mon = (data[RTC_MONTH] & 0x0f) - 1; + tm->tm_year = (data[RTC_YEAR1] & 0x7f) + 100; + tm->tm_yday = 0; + tm->tm_isdst = 0; +} + +static int s5m8767_tm_to_data(struct rtc_time *tm, u8 *data) +{ + data[RTC_SEC] = tm->tm_sec; + data[RTC_MIN] = tm->tm_min; + + if (tm->tm_hour >= 12) + data[RTC_HOUR] = tm->tm_hour | HOUR_PM_MASK; + else + data[RTC_HOUR] = tm->tm_hour & ~HOUR_PM_MASK; + + data[RTC_WEEKDAY] = 1 << tm->tm_wday; + data[RTC_DATE] = tm->tm_mday; + data[RTC_MONTH] = tm->tm_mon + 1; + data[RTC_YEAR1] = tm->tm_year > 100 ? (tm->tm_year - 100) : 0; + + if (tm->tm_year < 100) { + pr_err("s5m8767 RTC cannot handle the year %d.\n", + 1900 + tm->tm_year); + return -EINVAL; + } else { + return 0; + } +} + +static inline int s5m8767_rtc_set_time_reg(struct s5m_rtc_info *info) +{ + int ret; + unsigned int data; + + ret = regmap_read(info->rtc, SEC_RTC_UDR_CON, &data); + if (ret < 0) { + dev_err(info->dev, "failed to read update reg(%d)\n", ret); + return ret; + } + + data |= RTC_TIME_EN_MASK; + data |= RTC_UDR_MASK; + + ret = regmap_write(info->rtc, SEC_RTC_UDR_CON, data); + if (ret < 0) { + dev_err(info->dev, "failed to write update reg(%d)\n", ret); + return ret; + } + + do { + ret = regmap_read(info->rtc, SEC_RTC_UDR_CON, &data); + } while ((data & RTC_UDR_MASK) && !ret); + + return ret; +} + +static inline int s5m8767_rtc_set_alarm_reg(struct s5m_rtc_info *info) +{ + int ret; + unsigned int data; + + ret = regmap_read(info->rtc, SEC_RTC_UDR_CON, &data); + if (ret < 0) { + dev_err(info->dev, "%s: fail to read update reg(%d)\n", + __func__, ret); + return ret; + } + + data &= ~RTC_TIME_EN_MASK; + data |= RTC_UDR_MASK; + + ret = regmap_write(info->rtc, SEC_RTC_UDR_CON, data); + if (ret < 0) { + dev_err(info->dev, "%s: fail to write update reg(%d)\n", + __func__, ret); + return ret; + } + + do { + ret = regmap_read(info->rtc, SEC_RTC_UDR_CON, &data); + } while ((data & RTC_UDR_MASK) && !ret); + + return ret; +} + +static void s5m8763_data_to_tm(u8 *data, struct rtc_time *tm) +{ + tm->tm_sec = bcd2bin(data[RTC_SEC]); + tm->tm_min = bcd2bin(data[RTC_MIN]); + + if (data[RTC_HOUR] & HOUR_12) { + tm->tm_hour = bcd2bin(data[RTC_HOUR] & 0x1f); + if (data[RTC_HOUR] & HOUR_PM) + tm->tm_hour += 12; + } else { + tm->tm_hour = bcd2bin(data[RTC_HOUR] & 0x3f); + } + + tm->tm_wday = data[RTC_WEEKDAY] & 0x07; + tm->tm_mday = bcd2bin(data[RTC_DATE]); + tm->tm_mon = bcd2bin(data[RTC_MONTH]); + tm->tm_year = bcd2bin(data[RTC_YEAR1]) + bcd2bin(data[RTC_YEAR2]) * 100; + tm->tm_year -= 1900; +} + +static void s5m8763_tm_to_data(struct rtc_time *tm, u8 *data) +{ + data[RTC_SEC] = bin2bcd(tm->tm_sec); + data[RTC_MIN] = bin2bcd(tm->tm_min); + data[RTC_HOUR] = bin2bcd(tm->tm_hour); + data[RTC_WEEKDAY] = tm->tm_wday; + data[RTC_DATE] = bin2bcd(tm->tm_mday); + data[RTC_MONTH] = bin2bcd(tm->tm_mon); + data[RTC_YEAR1] = bin2bcd(tm->tm_year % 100); + data[RTC_YEAR2] = bin2bcd((tm->tm_year + 1900) / 100); +} + +static int s5m_rtc_read_time(struct device *dev, struct rtc_time *tm) +{ + struct s5m_rtc_info *info = dev_get_drvdata(dev); + u8 data[8]; + int ret; + + ret = regmap_bulk_read(info->rtc, SEC_RTC_SEC, data, 8); + if (ret < 0) + return ret; + + switch (info->device_type) { + case S5M8763X: + s5m8763_data_to_tm(data, tm); + break; + + case S5M8767X: + s5m8767_data_to_tm(data, tm, info->rtc_24hr_mode); + break; + + default: + return -EINVAL; + } + + dev_dbg(dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__, + 1900 + tm->tm_year, 1 + tm->tm_mon, tm->tm_mday, + tm->tm_hour, tm->tm_min, tm->tm_sec, tm->tm_wday); + + return rtc_valid_tm(tm); +} + +static int s5m_rtc_set_time(struct device *dev, struct rtc_time *tm) +{ + struct s5m_rtc_info *info = dev_get_drvdata(dev); + u8 data[8]; + int ret = 0; + + switch (info->device_type) { + case S5M8763X: + s5m8763_tm_to_data(tm, data); + break; + case S5M8767X: + ret = s5m8767_tm_to_data(tm, data); + break; + default: + return -EINVAL; + } + + if (ret < 0) + return ret; + + dev_dbg(dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__, + 1900 + tm->tm_year, 1 + tm->tm_mon, tm->tm_mday, + tm->tm_hour, tm->tm_min, tm->tm_sec, tm->tm_wday); + + ret = regmap_raw_write(info->rtc, SEC_RTC_SEC, data, 8); + if (ret < 0) + return ret; + + ret = s5m8767_rtc_set_time_reg(info); + + return ret; +} + +static int s5m_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) +{ + struct s5m_rtc_info *info = dev_get_drvdata(dev); + u8 data[8]; + unsigned int val; + int ret, i; + + ret = regmap_bulk_read(info->rtc, SEC_ALARM0_SEC, data, 8); + if (ret < 0) + return ret; + + switch (info->device_type) { + case S5M8763X: + s5m8763_data_to_tm(data, &alrm->time); + ret = regmap_read(info->rtc, SEC_ALARM0_CONF, &val); + if (ret < 0) + return ret; + + alrm->enabled = !!val; + + ret = regmap_read(info->rtc, SEC_RTC_STATUS, &val); + if (ret < 0) + return ret; + + break; + + case S5M8767X: + s5m8767_data_to_tm(data, &alrm->time, info->rtc_24hr_mode); + dev_dbg(dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__, + 1900 + alrm->time.tm_year, 1 + alrm->time.tm_mon, + alrm->time.tm_mday, alrm->time.tm_hour, + alrm->time.tm_min, alrm->time.tm_sec, + alrm->time.tm_wday); + + alrm->enabled = 0; + for (i = 0; i < 7; i++) { + if (data[i] & ALARM_ENABLE_MASK) { + alrm->enabled = 1; + break; + } + } + + alrm->pending = 0; + ret = regmap_read(info->rtc, SEC_RTC_STATUS, &val); + if (ret < 0) + return ret; + break; + + default: + return -EINVAL; + } + + if (val & ALARM0_STATUS) + alrm->pending = 1; + else + alrm->pending = 0; + + return 0; +} + +static int s5m_rtc_stop_alarm(struct s5m_rtc_info *info) +{ + u8 data[8]; + int ret, i; + struct rtc_time tm; + + ret = regmap_bulk_read(info->rtc, SEC_ALARM0_SEC, data, 8); + if (ret < 0) + return ret; + + s5m8767_data_to_tm(data, &tm, info->rtc_24hr_mode); + dev_dbg(info->dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__, + 1900 + tm.tm_year, 1 + tm.tm_mon, tm.tm_mday, + tm.tm_hour, tm.tm_min, tm.tm_sec, tm.tm_wday); + + switch (info->device_type) { + case S5M8763X: + ret = regmap_write(info->rtc, SEC_ALARM0_CONF, 0); + break; + + case S5M8767X: + for (i = 0; i < 7; i++) + data[i] &= ~ALARM_ENABLE_MASK; + + ret = regmap_raw_write(info->rtc, SEC_ALARM0_SEC, data, 8); + if (ret < 0) + return ret; + + ret = s5m8767_rtc_set_alarm_reg(info); + + break; + + default: + return -EINVAL; + } + + return ret; +} + +static int s5m_rtc_start_alarm(struct s5m_rtc_info *info) +{ + int ret; + u8 data[8]; + u8 alarm0_conf; + struct rtc_time tm; + + ret = regmap_bulk_read(info->rtc, SEC_ALARM0_SEC, data, 8); + if (ret < 0) + return ret; + + s5m8767_data_to_tm(data, &tm, info->rtc_24hr_mode); + dev_dbg(info->dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__, + 1900 + tm.tm_year, 1 + tm.tm_mon, tm.tm_mday, + tm.tm_hour, tm.tm_min, tm.tm_sec, tm.tm_wday); + + switch (info->device_type) { + case S5M8763X: + alarm0_conf = 0x77; + ret = regmap_write(info->rtc, SEC_ALARM0_CONF, alarm0_conf); + break; + + case S5M8767X: + data[RTC_SEC] |= ALARM_ENABLE_MASK; + data[RTC_MIN] |= ALARM_ENABLE_MASK; + data[RTC_HOUR] |= ALARM_ENABLE_MASK; + data[RTC_WEEKDAY] &= ~ALARM_ENABLE_MASK; + if (data[RTC_DATE] & 0x1f) + data[RTC_DATE] |= ALARM_ENABLE_MASK; + if (data[RTC_MONTH] & 0xf) + data[RTC_MONTH] |= ALARM_ENABLE_MASK; + if (data[RTC_YEAR1] & 0x7f) + data[RTC_YEAR1] |= ALARM_ENABLE_MASK; + + ret = regmap_raw_write(info->rtc, SEC_ALARM0_SEC, data, 8); + if (ret < 0) + return ret; + ret = s5m8767_rtc_set_alarm_reg(info); + + break; + + default: + return -EINVAL; + } + + return ret; +} + +static int s5m_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) +{ + struct s5m_rtc_info *info = dev_get_drvdata(dev); + u8 data[8]; + int ret; + + switch (info->device_type) { + case S5M8763X: + s5m8763_tm_to_data(&alrm->time, data); + break; + + case S5M8767X: + s5m8767_tm_to_data(&alrm->time, data); + break; + + default: + return -EINVAL; + } + + dev_dbg(dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__, + 1900 + alrm->time.tm_year, 1 + alrm->time.tm_mon, + alrm->time.tm_mday, alrm->time.tm_hour, alrm->time.tm_min, + alrm->time.tm_sec, alrm->time.tm_wday); + + ret = s5m_rtc_stop_alarm(info); + if (ret < 0) + return ret; + + ret = regmap_raw_write(info->rtc, SEC_ALARM0_SEC, data, 8); + if (ret < 0) + return ret; + + ret = s5m8767_rtc_set_alarm_reg(info); + if (ret < 0) + return ret; + + if (alrm->enabled) + ret = s5m_rtc_start_alarm(info); + + return ret; +} + +static int s5m_rtc_alarm_irq_enable(struct device *dev, + unsigned int enabled) +{ + struct s5m_rtc_info *info = dev_get_drvdata(dev); + + if (enabled) + return s5m_rtc_start_alarm(info); + else + return s5m_rtc_stop_alarm(info); +} + +static irqreturn_t s5m_rtc_alarm_irq(int irq, void *data) +{ + struct s5m_rtc_info *info = data; + + rtc_update_irq(info->rtc_dev, 1, RTC_IRQF | RTC_AF); + + return IRQ_HANDLED; +} + +static const struct rtc_class_ops s5m_rtc_ops = { + .read_time = s5m_rtc_read_time, + .set_time = s5m_rtc_set_time, + .read_alarm = s5m_rtc_read_alarm, + .set_alarm = s5m_rtc_set_alarm, + .alarm_irq_enable = s5m_rtc_alarm_irq_enable, +}; + +static void s5m_rtc_enable_wtsr(struct s5m_rtc_info *info, bool enable) +{ + int ret; + ret = regmap_update_bits(info->rtc, SEC_WTSR_SMPL_CNTL, + WTSR_ENABLE_MASK, + enable ? WTSR_ENABLE_MASK : 0); + if (ret < 0) + dev_err(info->dev, "%s: fail to update WTSR reg(%d)\n", + __func__, ret); +} + +static void s5m_rtc_enable_smpl(struct s5m_rtc_info *info, bool enable) +{ + int ret; + ret = regmap_update_bits(info->rtc, SEC_WTSR_SMPL_CNTL, + SMPL_ENABLE_MASK, + enable ? SMPL_ENABLE_MASK : 0); + if (ret < 0) + dev_err(info->dev, "%s: fail to update SMPL reg(%d)\n", + __func__, ret); +} + +static int s5m8767_rtc_init_reg(struct s5m_rtc_info *info) +{ + u8 data[2]; + unsigned int tp_read; + int ret; + struct rtc_time tm; + + ret = regmap_read(info->rtc, SEC_RTC_UDR_CON, &tp_read); + if (ret < 0) { + dev_err(info->dev, "%s: fail to read control reg(%d)\n", + __func__, ret); + return ret; + } + + /* Set RTC control register : Binary mode, 24hour mode */ + data[0] = (1 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT); + data[1] = (0 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT); + + info->rtc_24hr_mode = 1; + ret = regmap_raw_write(info->rtc, SEC_ALARM0_CONF, data, 2); + if (ret < 0) { + dev_err(info->dev, "%s: fail to write controlm reg(%d)\n", + __func__, ret); + return ret; + } + + /* In first boot time, Set rtc time to 1/1/2012 00:00:00(SUN) */ + if ((tp_read & RTC_TCON_MASK) == 0) { + dev_dbg(info->dev, "rtc init\n"); + tm.tm_sec = 0; + tm.tm_min = 0; + tm.tm_hour = 0; + tm.tm_wday = 0; + tm.tm_mday = 1; + tm.tm_mon = 0; + tm.tm_year = 112; + tm.tm_yday = 0; + tm.tm_isdst = 0; + ret = s5m_rtc_set_time(info->dev, &tm); + } + + ret = regmap_update_bits(info->rtc, SEC_RTC_UDR_CON, + RTC_TCON_MASK, tp_read | RTC_TCON_MASK); + if (ret < 0) + dev_err(info->dev, "%s: fail to update TCON reg(%d)\n", + __func__, ret); + + return ret; +} + +static int s5m_rtc_probe(struct platform_device *pdev) +{ + struct sec_pmic_dev *s5m87xx = dev_get_drvdata(pdev->dev.parent); + struct sec_platform_data *pdata = s5m87xx->pdata; + struct s5m_rtc_info *info; + int ret; + + if (!pdata) { + dev_err(pdev->dev.parent, "Platform data not supplied\n"); + return -ENODEV; + } + + info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL); + if (!info) + return -ENOMEM; + + info->dev = &pdev->dev; + info->s5m87xx = s5m87xx; + info->rtc = s5m87xx->rtc; + info->device_type = s5m87xx->device_type; + info->wtsr_smpl = s5m87xx->wtsr_smpl; + + switch (pdata->device_type) { + case S5M8763X: + info->irq = s5m87xx->irq_base + S5M8763_IRQ_ALARM0; + break; + + case S5M8767X: + info->irq = s5m87xx->irq_base + S5M8767_IRQ_RTCA1; + break; + + default: + ret = -EINVAL; + dev_err(&pdev->dev, "Unsupported device type: %d\n", ret); + return ret; + } + + platform_set_drvdata(pdev, info); + + ret = s5m8767_rtc_init_reg(info); + + if (info->wtsr_smpl) { + s5m_rtc_enable_wtsr(info, true); + s5m_rtc_enable_smpl(info, true); + } + + device_init_wakeup(&pdev->dev, 1); + + info->rtc_dev = devm_rtc_device_register(&pdev->dev, "s5m-rtc", + &s5m_rtc_ops, THIS_MODULE); + + if (IS_ERR(info->rtc_dev)) + return PTR_ERR(info->rtc_dev); + + ret = devm_request_threaded_irq(&pdev->dev, info->irq, NULL, + s5m_rtc_alarm_irq, 0, "rtc-alarm0", + info); + if (ret < 0) + dev_err(&pdev->dev, "Failed to request alarm IRQ: %d: %d\n", + info->irq, ret); + + return ret; +} + +static void s5m_rtc_shutdown(struct platform_device *pdev) +{ + struct s5m_rtc_info *info = platform_get_drvdata(pdev); + int i; + unsigned int val = 0; + if (info->wtsr_smpl) { + for (i = 0; i < 3; i++) { + s5m_rtc_enable_wtsr(info, false); + regmap_read(info->rtc, SEC_WTSR_SMPL_CNTL, &val); + pr_debug("%s: WTSR_SMPL reg(0x%02x)\n", __func__, val); + if (val & WTSR_ENABLE_MASK) + pr_emerg("%s: fail to disable WTSR\n", + __func__); + else { + pr_info("%s: success to disable WTSR\n", + __func__); + break; + } + } + } + /* Disable SMPL when power off */ + s5m_rtc_enable_smpl(info, false); +} + +static const struct platform_device_id s5m_rtc_id[] = { + { "s5m-rtc", 0 }, +}; + +static struct platform_driver s5m_rtc_driver = { + .driver = { + .name = "s5m-rtc", + .owner = THIS_MODULE, + }, + .probe = s5m_rtc_probe, + .shutdown = s5m_rtc_shutdown, + .id_table = s5m_rtc_id, +}; + +module_platform_driver(s5m_rtc_driver); + +/* Module information */ +MODULE_AUTHOR("Sangbeom Kim "); +MODULE_DESCRIPTION("Samsung S5M RTC driver"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:s5m-rtc"); diff --git a/include/linux/mfd/samsung/core.h b/include/linux/mfd/samsung/core.h index 378ae8a04c6a..2d0c9071bcfb 100644 --- a/include/linux/mfd/samsung/core.h +++ b/include/linux/mfd/samsung/core.h @@ -51,6 +51,7 @@ struct sec_pmic_dev { int ono; int type; bool wakeup; + bool wtsr_smpl; }; int sec_irq_init(struct sec_pmic_dev *sec_pmic); diff --git a/include/linux/mfd/samsung/rtc.h b/include/linux/mfd/samsung/rtc.h index 71597e20cddb..94b7cd6d8891 100644 --- a/include/linux/mfd/samsung/rtc.h +++ b/include/linux/mfd/samsung/rtc.h @@ -62,6 +62,11 @@ enum sec_rtc_reg { /* RTC Update Register1 */ #define RTC_UDR_SHIFT 0 #define RTC_UDR_MASK (1 << RTC_UDR_SHIFT) +#define RTC_TCON_SHIFT 1 +#define RTC_TCON_MASK (1 << RTC_TCON_SHIFT) +#define RTC_TIME_EN_SHIFT 3 +#define RTC_TIME_EN_MASK (1 << RTC_TIME_EN_SHIFT) + /* RTC Hour register */ #define HOUR_PM_SHIFT 6 #define HOUR_PM_MASK (1 << HOUR_PM_SHIFT) @@ -69,6 +74,12 @@ enum sec_rtc_reg { #define ALARM_ENABLE_SHIFT 7 #define ALARM_ENABLE_MASK (1 << ALARM_ENABLE_SHIFT) +#define SMPL_ENABLE_SHIFT 7 +#define SMPL_ENABLE_MASK (1 << SMPL_ENABLE_SHIFT) + +#define WTSR_ENABLE_SHIFT 6 +#define WTSR_ENABLE_MASK (1 << WTSR_ENABLE_SHIFT) + enum { RTC_SEC = 0, RTC_MIN, -- cgit v1.2.3-71-gd317