cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
Log | Files | Refs | Submodules | LICENSE | sfeed.txt

remote.c (2327B)

      1/*
      2 * Remote PCI host device
      3 *
      4 * Unlike PCI host devices that model physical hardware, the purpose
      5 * of this PCI host is to host multi-process QEMU devices.
      6 *
      7 * Multi-process QEMU extends the PCI host of a QEMU machine into a
      8 * remote process. Any PCI device attached to the remote process is
      9 * visible in the QEMU guest. This allows existing QEMU device models
     10 * to be reused in the remote process.
     11 *
     12 * This PCI host is purely a container for PCI devices. It's fake in the
     13 * sense that the guest never sees this PCI host and has no way of
     14 * accessing it. Its job is just to provide the environment that QEMU
     15 * PCI device models need when running in a remote process.
     16 *
     17 * Copyright © 2018, 2021 Oracle and/or its affiliates.
     18 *
     19 * This work is licensed under the terms of the GNU GPL, version 2 or later.
     20 * See the COPYING file in the top-level directory.
     21 *
     22 */
     23
     24#include "qemu/osdep.h"
     25#include "qemu-common.h"
     26
     27#include "hw/pci/pci.h"
     28#include "hw/pci/pci_host.h"
     29#include "hw/pci/pcie_host.h"
     30#include "hw/qdev-properties.h"
     31#include "hw/pci-host/remote.h"
     32#include "exec/memory.h"
     33
     34static const char *remote_pcihost_root_bus_path(PCIHostState *host_bridge,
     35                                                PCIBus *rootbus)
     36{
     37    return "0000:00";
     38}
     39
     40static void remote_pcihost_realize(DeviceState *dev, Error **errp)
     41{
     42    PCIHostState *pci = PCI_HOST_BRIDGE(dev);
     43    RemotePCIHost *s = REMOTE_PCIHOST(dev);
     44
     45    pci->bus = pci_root_bus_new(DEVICE(s), "remote-pci",
     46                                s->mr_pci_mem, s->mr_sys_io,
     47                                0, TYPE_PCIE_BUS);
     48}
     49
     50static void remote_pcihost_class_init(ObjectClass *klass, void *data)
     51{
     52    DeviceClass *dc = DEVICE_CLASS(klass);
     53    PCIHostBridgeClass *hc = PCI_HOST_BRIDGE_CLASS(klass);
     54
     55    hc->root_bus_path = remote_pcihost_root_bus_path;
     56    dc->realize = remote_pcihost_realize;
     57
     58    dc->user_creatable = false;
     59    set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
     60    dc->fw_name = "pci";
     61}
     62
     63static const TypeInfo remote_pcihost_info = {
     64    .name = TYPE_REMOTE_PCIHOST,
     65    .parent = TYPE_PCIE_HOST_BRIDGE,
     66    .instance_size = sizeof(RemotePCIHost),
     67    .class_init = remote_pcihost_class_init,
     68};
     69
     70static void remote_pcihost_register(void)
     71{
     72    type_register_static(&remote_pcihost_info);
     73}
     74
     75type_init(remote_pcihost_register)