cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
Log | Files | Refs | Submodules | LICENSE | sfeed.txt

meson.build (624B)

      1pci_ss = ss.source_set()
      2pci_ss.add(files(
      3  'msi.c',
      4  'msix.c',
      5  'pci.c',
      6  'pci_bridge.c',
      7  'pci_host.c',
      8  'shpc.c',
      9  'slotid_cap.c'
     10))
     11# The functions in these modules can be used by devices too.  Since we
     12# allow plugging PCIe devices into PCI buses, include them even if
     13# CONFIG_PCI_EXPRESS=n.
     14pci_ss.add(files('pcie.c', 'pcie_aer.c'))
     15softmmu_ss.add(when: 'CONFIG_PCI_EXPRESS', if_true: files('pcie_port.c', 'pcie_host.c'))
     16softmmu_ss.add_all(when: 'CONFIG_PCI', if_true: pci_ss)
     17
     18softmmu_ss.add(when: 'CONFIG_PCI', if_false: files('pci-stub.c'))
     19softmmu_ss.add(when: 'CONFIG_ALL', if_true: files('pci-stub.c'))