cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
Log | Files | Refs | Submodules | LICENSE | sfeed.txt

max111x.h (1461B)

      1/*
      2 * Maxim MAX1110/1111 ADC chip emulation.
      3 *
      4 * Copyright (c) 2006 Openedhand Ltd.
      5 * Written by Andrzej Zaborowski <balrog@zabor.org>
      6 *
      7 * This code is licensed under the GNU GPLv2.
      8 *
      9 * Contributions after 2012-01-13 are licensed under the terms of the
     10 * GNU GPL, version 2 or (at your option) any later version.
     11 */
     12
     13#ifndef HW_MISC_MAX111X_H
     14#define HW_MISC_MAX111X_H
     15
     16#include "hw/ssi/ssi.h"
     17#include "qom/object.h"
     18
     19/*
     20 * This is a model of the Maxim MAX1110/1111 ADC chip, which for QEMU
     21 * is an SSI slave device. It has either 4 (max1110) or 8 (max1111)
     22 * 8-bit ADC channels.
     23 *
     24 * QEMU interface:
     25 *  + GPIO inputs 0..3 (for max1110) or 0..7 (for max1111): set the value
     26 *    of each ADC input, as an unsigned 8-bit value
     27 *  + GPIO output 0: interrupt line
     28 *  + Properties "input0" to "input3" (max1110) or "input0" to "input7"
     29 *    (max1111): initial reset values for ADC inputs.
     30 *
     31 * Known bugs:
     32 *  + the interrupt line is not correctly implemented, and will never
     33 *    be lowered once it has been asserted.
     34 */
     35struct MAX111xState {
     36    SSIPeripheral parent_obj;
     37
     38    qemu_irq interrupt;
     39    /* Values of inputs at system reset (settable by QOM property) */
     40    uint8_t reset_input[8];
     41
     42    uint8_t tb1, rb2, rb3;
     43    int cycle;
     44
     45    uint8_t input[8];
     46    int inputs, com;
     47};
     48
     49#define TYPE_MAX_111X "max111x"
     50
     51OBJECT_DECLARE_SIMPLE_TYPE(MAX111xState, MAX_111X)
     52
     53#define TYPE_MAX_1110 "max1110"
     54#define TYPE_MAX_1111 "max1111"
     55
     56#endif