cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
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isa.h (4721B)


      1#ifndef HW_ISA_H
      2#define HW_ISA_H
      3
      4/* ISA bus */
      5
      6#include "exec/memory.h"
      7#include "exec/ioport.h"
      8#include "hw/qdev-core.h"
      9#include "qom/object.h"
     10
     11#define ISA_NUM_IRQS 16
     12
     13#define TYPE_ISA_DEVICE "isa-device"
     14OBJECT_DECLARE_TYPE(ISADevice, ISADeviceClass, ISA_DEVICE)
     15
     16#define TYPE_ISA_BUS "ISA"
     17OBJECT_DECLARE_SIMPLE_TYPE(ISABus, ISA_BUS)
     18
     19#define TYPE_APPLE_SMC "isa-applesmc"
     20#define APPLESMC_MAX_DATA_LENGTH       32
     21#define APPLESMC_PROP_IO_BASE "iobase"
     22
     23static inline uint16_t applesmc_port(void)
     24{
     25    Object *obj = object_resolve_path_type("", TYPE_APPLE_SMC, NULL);
     26
     27    if (obj) {
     28        return object_property_get_uint(obj, APPLESMC_PROP_IO_BASE, NULL);
     29    }
     30    return 0;
     31}
     32
     33#define TYPE_ISADMA "isa-dma"
     34
     35typedef struct IsaDmaClass IsaDmaClass;
     36DECLARE_CLASS_CHECKERS(IsaDmaClass, ISADMA,
     37                       TYPE_ISADMA)
     38#define ISADMA(obj) \
     39    INTERFACE_CHECK(IsaDma, (obj), TYPE_ISADMA)
     40
     41typedef enum {
     42    ISADMA_TRANSFER_VERIFY,
     43    ISADMA_TRANSFER_READ,
     44    ISADMA_TRANSFER_WRITE,
     45    ISADMA_TRANSFER_ILLEGAL,
     46} IsaDmaTransferMode;
     47
     48typedef int (*IsaDmaTransferHandler)(void *opaque, int nchan, int pos,
     49                                     int size);
     50
     51struct IsaDmaClass {
     52    InterfaceClass parent;
     53
     54    bool (*has_autoinitialization)(IsaDma *obj, int nchan);
     55    int (*read_memory)(IsaDma *obj, int nchan, void *buf, int pos, int len);
     56    int (*write_memory)(IsaDma *obj, int nchan, void *buf, int pos, int len);
     57    void (*hold_DREQ)(IsaDma *obj, int nchan);
     58    void (*release_DREQ)(IsaDma *obj, int nchan);
     59    void (*schedule)(IsaDma *obj);
     60    void (*register_channel)(IsaDma *obj, int nchan,
     61                             IsaDmaTransferHandler transfer_handler,
     62                             void *opaque);
     63};
     64
     65struct ISADeviceClass {
     66    DeviceClass parent_class;
     67    void (*build_aml)(ISADevice *dev, Aml *scope);
     68};
     69
     70struct ISABus {
     71    /*< private >*/
     72    BusState parent_obj;
     73    /*< public >*/
     74
     75    MemoryRegion *address_space;
     76    MemoryRegion *address_space_io;
     77    qemu_irq *irqs;
     78    IsaDma *dma[2];
     79};
     80
     81struct ISADevice {
     82    /*< private >*/
     83    DeviceState parent_obj;
     84    /*< public >*/
     85
     86    int8_t isairq[2];      /* -1 = unassigned */
     87    int nirqs;
     88    int ioport_id;
     89};
     90
     91ISABus *isa_bus_new(DeviceState *dev, MemoryRegion *address_space,
     92                    MemoryRegion *address_space_io, Error **errp);
     93void isa_bus_irqs(ISABus *bus, qemu_irq *irqs);
     94qemu_irq isa_get_irq(ISADevice *dev, unsigned isairq);
     95void isa_init_irq(ISADevice *dev, qemu_irq *p, unsigned isairq);
     96void isa_connect_gpio_out(ISADevice *isadev, int gpioirq, unsigned isairq);
     97void isa_bus_dma(ISABus *bus, IsaDma *dma8, IsaDma *dma16);
     98IsaDma *isa_get_dma(ISABus *bus, int nchan);
     99MemoryRegion *isa_address_space(ISADevice *dev);
    100MemoryRegion *isa_address_space_io(ISADevice *dev);
    101ISADevice *isa_new(const char *name);
    102ISADevice *isa_try_new(const char *name);
    103bool isa_realize_and_unref(ISADevice *dev, ISABus *bus, Error **errp);
    104ISADevice *isa_create_simple(ISABus *bus, const char *name);
    105
    106ISADevice *isa_vga_init(ISABus *bus);
    107void isa_build_aml(ISABus *bus, Aml *scope);
    108
    109/**
    110 * isa_register_ioport: Install an I/O port region on the ISA bus.
    111 *
    112 * Register an I/O port region via memory_region_add_subregion
    113 * inside the ISA I/O address space.
    114 *
    115 * @dev: the ISADevice against which these are registered; may be NULL.
    116 * @io: the #MemoryRegion being registered.
    117 * @start: the base I/O port.
    118 */
    119void isa_register_ioport(ISADevice *dev, MemoryRegion *io, uint16_t start);
    120
    121/**
    122 * isa_register_portio_list: Initialize a set of ISA io ports
    123 *
    124 * Several ISA devices have many dis-joint I/O ports.  Worse, these I/O
    125 * ports can be interleaved with I/O ports from other devices.  This
    126 * function makes it easy to create multiple MemoryRegions for a single
    127 * device and use the legacy portio routines.
    128 *
    129 * @dev: the ISADevice against which these are registered; may be NULL.
    130 * @piolist: the PortioList associated with the io ports
    131 * @start: the base I/O port against which the portio->offset is applied.
    132 * @portio: the ports, sorted by offset.
    133 * @opaque: passed into the portio callbacks.
    134 * @name: passed into memory_region_init_io.
    135 *
    136 * Returns: 0 on success, negative error code otherwise (e.g. if the
    137 *          ISA bus is not available)
    138 */
    139int isa_register_portio_list(ISADevice *dev,
    140                             PortioList *piolist,
    141                             uint16_t start,
    142                             const MemoryRegionPortio *portio,
    143                             void *opaque, const char *name);
    144
    145static inline ISABus *isa_bus_from_device(ISADevice *d)
    146{
    147    return ISA_BUS(qdev_get_parent_bus(DEVICE(d)));
    148}
    149
    150#define TYPE_PIIX4_PCI_DEVICE "piix4-isa"
    151
    152#endif