cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
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armsse-cpuid.h (1010B)

      1/*
      2 * ARM SSE-200 CPU_IDENTITY register block
      3 *
      4 * Copyright (c) 2019 Linaro Limited
      5 * Written by Peter Maydell
      6 *
      7 *  This program is free software; you can redistribute it and/or modify
      8 *  it under the terms of the GNU General Public License version 2 or
      9 *  (at your option) any later version.
     10 */
     11
     12/*
     13 * This is a model of the "CPU_IDENTITY" register block which is part of the
     14 * Arm SSE-200 and documented in
     15 * https://developer.arm.com/documentation/101104/latest/
     16 *
     17 * QEMU interface:
     18 *  + QOM property "CPUID": the value to use for the CPUID register
     19 *  + sysbus MMIO region 0: the system information register bank
     20 */
     21
     22#ifndef HW_MISC_ARMSSE_CPUID_H
     23#define HW_MISC_ARMSSE_CPUID_H
     24
     25#include "hw/sysbus.h"
     26#include "qom/object.h"
     27
     28#define TYPE_ARMSSE_CPUID "armsse-cpuid"
     29OBJECT_DECLARE_SIMPLE_TYPE(ARMSSECPUID, ARMSSE_CPUID)
     30
     31struct ARMSSECPUID {
     32    /*< private >*/
     33    SysBusDevice parent_obj;
     34
     35    /*< public >*/
     36    MemoryRegion iomem;
     37
     38    /* Properties */
     39    uint32_t cpuid;
     40};
     41
     42#endif