cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
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pnv_homer.h (1625B)

      1/*
      2 * QEMU PowerPC PowerNV Emulation of a few HOMER related registers
      3 *
      4 * Copyright (c) 2019, IBM Corporation.
      5 *
      6 * This library is free software; you can redistribute it and/or
      7 * modify it under the terms of the GNU Lesser General Public
      8 * License as published by the Free Software Foundation; either
      9 * version 2.1 of the License, or (at your option) any later version.
     10 *
     11 * This library is distributed in the hope that it will be useful,
     12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
     13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
     14 * Lesser General Public License for more details.
     15 *
     16 * You should have received a copy of the GNU Lesser General Public
     17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
     18 */
     19
     20#ifndef PPC_PNV_HOMER_H
     21#define PPC_PNV_HOMER_H
     22
     23#include "hw/ppc/pnv.h"
     24#include "qom/object.h"
     25
     26#define TYPE_PNV_HOMER "pnv-homer"
     27OBJECT_DECLARE_TYPE(PnvHomer, PnvHomerClass,
     28                    PNV_HOMER)
     29#define TYPE_PNV8_HOMER TYPE_PNV_HOMER "-POWER8"
     30DECLARE_INSTANCE_CHECKER(PnvHomer, PNV8_HOMER,
     31                         TYPE_PNV8_HOMER)
     32#define TYPE_PNV9_HOMER TYPE_PNV_HOMER "-POWER9"
     33DECLARE_INSTANCE_CHECKER(PnvHomer, PNV9_HOMER,
     34                         TYPE_PNV9_HOMER)
     35
     36struct PnvHomer {
     37    DeviceState parent;
     38
     39    struct PnvChip *chip;
     40    MemoryRegion pba_regs;
     41    MemoryRegion regs;
     42};
     43
     44
     45struct PnvHomerClass {
     46    DeviceClass parent_class;
     47
     48    int pba_size;
     49    const MemoryRegionOps *pba_ops;
     50    int homer_size;
     51    const MemoryRegionOps *homer_ops;
     52
     53    hwaddr core_max_base;
     54};
     55
     56#endif /* PPC_PNV_HOMER_H */