cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
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crisv32-decode.h (5642B)


      1/*
      2 *  CRIS insn decoding macros.
      3 *
      4 *  Copyright (c) 2007 AXIS Communications AB
      5 *  Written by Edgar E. Iglesias.
      6 *
      7 * This library is free software; you can redistribute it and/or
      8 * modify it under the terms of the GNU Lesser General Public
      9 * License as published by the Free Software Foundation; either
     10 * version 2.1 of the License, or (at your option) any later version.
     11 *
     12 * This library is distributed in the hope that it will be useful,
     13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
     14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
     15 * Lesser General Public License for more details.
     16 *
     17 * You should have received a copy of the GNU Lesser General Public
     18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
     19 */
     20
     21#ifndef CRISV32_DECODE_H
     22#define CRISV32_DECODE_H
     23
     24/* Convenient binary macros.  */
     25#define HEX__(n) 0x##n##LU
     26#define B8__(x) ((x&0x0000000FLU)?1:0) \
     27                 + ((x&0x000000F0LU)?2:0) \
     28                 + ((x&0x00000F00LU)?4:0) \
     29                 + ((x&0x0000F000LU)?8:0) \
     30                 + ((x&0x000F0000LU)?16:0) \
     31                 + ((x&0x00F00000LU)?32:0) \
     32                 + ((x&0x0F000000LU)?64:0) \
     33                 + ((x&0xF0000000LU)?128:0)
     34#define B8(d) ((unsigned char)B8__(HEX__(d)))
     35
     36/* Quick imm.  */
     37#define DEC_BCCQ     {B8(00000000), B8(11110000)}
     38#define DEC_ADDOQ    {B8(00010000), B8(11110000)}
     39#define DEC_ADDQ     {B8(00100000), B8(11111100)}
     40#define DEC_MOVEQ    {B8(00100100), B8(11111100)}
     41#define DEC_SUBQ     {B8(00101000), B8(11111100)}
     42#define DEC_CMPQ     {B8(00101100), B8(11111100)}
     43#define DEC_ANDQ     {B8(00110000), B8(11111100)}
     44#define DEC_ORQ      {B8(00110100), B8(11111100)}
     45#define DEC_BTSTQ    {B8(00111000), B8(11111110)}
     46#define DEC_ASRQ     {B8(00111010), B8(11111110)}
     47#define DEC_LSLQ     {B8(00111100), B8(11111110)}
     48#define DEC_LSRQ     {B8(00111110), B8(11111110)}
     49
     50/* Register.  */
     51#define DEC_MOVU_R   {B8(01000100), B8(11111110)}
     52#define DEC_MOVU_R   {B8(01000100), B8(11111110)}
     53#define DEC_MOVS_R   {B8(01000110), B8(11111110)}
     54#define DEC_MOVE_R   {B8(01100100), B8(11111100)}
     55#define DEC_MOVE_RP  {B8(01100011), B8(11111111)}
     56#define DEC_MOVE_PR  {B8(01100111), B8(11111111)}
     57#define DEC_DSTEP_R  {B8(01101111), B8(11111111)}
     58#define DEC_MOVE_RS  {B8(10110111), B8(11111111)}
     59#define DEC_MOVE_SR  {B8(11110111), B8(11111111)}
     60#define DEC_ADDU_R   {B8(01000000), B8(11111110)}
     61#define DEC_ADDS_R   {B8(01000010), B8(11111110)}
     62#define DEC_ADD_R    {B8(01100000), B8(11111100)}
     63#define DEC_ADDI_R   {B8(01010000), B8(11111100)}
     64#define DEC_MULS_R   {B8(11010000), B8(11111100)}
     65#define DEC_MULU_R   {B8(10010000), B8(11111100)}
     66#define DEC_ADDI_ACR {B8(01010100), B8(11111100)}
     67#define DEC_NEG_R    {B8(01011000), B8(11111100)}
     68#define DEC_BOUND_R  {B8(01011100), B8(11111100)}
     69#define DEC_SUBU_R   {B8(01001000), B8(11111110)}
     70#define DEC_SUBS_R   {B8(01001010), B8(11111110)}
     71#define DEC_SUB_R    {B8(01101000), B8(11111100)}
     72#define DEC_CMP_R    {B8(01101100), B8(11111100)}
     73#define DEC_AND_R    {B8(01110000), B8(11111100)}
     74#define DEC_ABS_R    {B8(01101011), B8(11111111)}
     75#define DEC_LZ_R     {B8(01110011), B8(11111111)}
     76#define DEC_MCP_R    {B8(01111111), B8(11111111)}
     77#define DEC_SWAP_R   {B8(01110111), B8(11111111)}
     78#define DEC_XOR_R    {B8(01111011), B8(11111111)}
     79#define DEC_LSL_R    {B8(01001100), B8(11111100)}
     80#define DEC_LSR_R    {B8(01111100), B8(11111100)}
     81#define DEC_ASR_R    {B8(01111000), B8(11111100)}
     82#define DEC_OR_R     {B8(01110100), B8(11111100)}
     83#define DEC_BTST_R   {B8(01001111), B8(11111111)}
     84
     85/* Fixed.  */
     86#define DEC_SETF     {B8(01011011), B8(11111111)}
     87#define DEC_CLEARF   {B8(01011111), B8(11111111)}
     88
     89/* Memory.  */
     90#define DEC_ADDU_M   {B8(10000000), B8(10111110)}
     91#define DEC_ADDS_M   {B8(10000010), B8(10111110)}
     92#define DEC_MOVU_M   {B8(10000100), B8(10111110)}
     93#define DEC_MOVS_M   {B8(10000110), B8(10111110)}
     94#define DEC_SUBU_M   {B8(10001000), B8(10111110)}
     95#define DEC_SUBS_M   {B8(10001010), B8(10111110)}
     96#define DEC_CMPU_M   {B8(10001100), B8(10111110)}
     97#define DEC_CMPS_M   {B8(10001110), B8(10111110)}
     98#define DEC_ADDO_M   {B8(10010100), B8(10111100)}
     99#define DEC_BOUND_M  {B8(10011100), B8(10111100)}
    100#define DEC_ADD_M    {B8(10100000), B8(10111100)}
    101#define DEC_MOVE_MR  {B8(10100100), B8(10111100)}
    102#define DEC_SUB_M    {B8(10101000), B8(10111100)}
    103#define DEC_CMP_M    {B8(10101100), B8(10111100)}
    104#define DEC_AND_M    {B8(10110000), B8(10111100)}
    105#define DEC_OR_M     {B8(10110100), B8(10111100)}
    106#define DEC_TEST_M   {B8(10111000), B8(10111100)}
    107#define DEC_MOVE_RM  {B8(10111100), B8(10111100)}
    108
    109#define DEC_ADDC_R   {B8(01010111), B8(11111111)}
    110#define DEC_ADDC_MR  {B8(10011010), B8(10111111)}
    111#define DEC_LAPCQ    {B8(10010111), B8(11111111)}
    112#define DEC_LAPC_IM  {B8(11010111), B8(11111111)}
    113
    114#define DEC_MOVE_MP  {B8(10100011), B8(10111111)}
    115#define DEC_MOVE_PM  {B8(10100111), B8(10111111)}
    116
    117#define DEC_SCC_R    {B8(01010011), B8(11111111)}
    118#define DEC_RFE_ETC  {B8(10010011), B8(11111111)}
    119#define DEC_JUMP_P   {B8(10011111), B8(11111111)}
    120#define DEC_BCC_IM   {B8(11011111), B8(11111111)}
    121#define DEC_JAS_R    {B8(10011011), B8(11111111)}
    122#define DEC_JASC_R   {B8(10110011), B8(11111111)}
    123#define DEC_JAS_IM   {B8(11011011), B8(11111111)}
    124#define DEC_JASC_IM  {B8(11110011), B8(11111111)}
    125#define DEC_BAS_IM   {B8(11101011), B8(11111111)}
    126#define DEC_BASC_IM  {B8(11101111), B8(11111111)}
    127#define DEC_MOVEM_MR {B8(10111011), B8(10111111)}
    128#define DEC_MOVEM_RM {B8(10111111), B8(10111111)}
    129
    130#define DEC_FTAG_FIDX_D_M {B8(10101011), B8(11111111)}
    131#define DEC_FTAG_FIDX_I_M {B8(11010011), B8(11111111)}
    132
    133#endif