cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
Log | Files | Refs | Submodules | LICENSE | sfeed.txt

meson.build (491B)

      1gen = decodetree.process('insns.decode')
      2
      3openrisc_ss = ss.source_set()
      4openrisc_ss.add(gen)
      5openrisc_ss.add(files(
      6  'cpu.c',
      7  'disas.c',
      8  'exception.c',
      9  'exception_helper.c',
     10  'fpu_helper.c',
     11  'gdbstub.c',
     12  'interrupt_helper.c',
     13  'mmu.c',
     14  'sys_helper.c',
     15  'translate.c',
     16))
     17
     18openrisc_softmmu_ss = ss.source_set()
     19openrisc_softmmu_ss.add(files(
     20  'interrupt.c',
     21  'machine.c',
     22))
     23
     24target_arch += {'openrisc': openrisc_ss}
     25target_softmmu_arch += {'openrisc': openrisc_softmmu_ss}