cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
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internals.h (1638B)


      1/*
      2 * QEMU RISC-V CPU -- internal functions and types
      3 *
      4 * Copyright (c) 2020 T-Head Semiconductor Co., Ltd. All rights reserved.
      5 *
      6 * This program is free software; you can redistribute it and/or modify it
      7 * under the terms and conditions of the GNU General Public License,
      8 * version 2 or later, as published by the Free Software Foundation.
      9 *
     10 * This program is distributed in the hope it will be useful, but WITHOUT
     11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
     12 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
     13 * more details.
     14 *
     15 * You should have received a copy of the GNU General Public License along with
     16 * this program.  If not, see <http://www.gnu.org/licenses/>.
     17 */
     18
     19#ifndef RISCV_CPU_INTERNALS_H
     20#define RISCV_CPU_INTERNALS_H
     21
     22#include "hw/registerfields.h"
     23
     24/* share data between vector helpers and decode code */
     25FIELD(VDATA, MLEN, 0, 8)
     26FIELD(VDATA, VM, 8, 1)
     27FIELD(VDATA, LMUL, 9, 2)
     28FIELD(VDATA, NF, 11, 4)
     29FIELD(VDATA, WD, 11, 1)
     30
     31/* float point classify helpers */
     32target_ulong fclass_h(uint64_t frs1);
     33target_ulong fclass_s(uint64_t frs1);
     34target_ulong fclass_d(uint64_t frs1);
     35
     36#define SEW8  0
     37#define SEW16 1
     38#define SEW32 2
     39#define SEW64 3
     40
     41#ifndef CONFIG_USER_ONLY
     42extern const VMStateDescription vmstate_riscv_cpu;
     43#endif
     44
     45static inline uint64_t nanbox_s(float32 f)
     46{
     47    return f | MAKE_64BIT_MASK(32, 32);
     48}
     49
     50static inline float32 check_nanbox_s(uint64_t f)
     51{
     52    uint64_t mask = MAKE_64BIT_MASK(32, 32);
     53
     54    if (likely((f & mask) == mask)) {
     55        return (uint32_t)f;
     56    } else {
     57        return 0x7fc00000u; /* default qnan */
     58    }
     59}
     60
     61#endif