cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
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tcg-target-con-str.h (731B)

      1/* SPDX-License-Identifier: MIT */
      2/*
      3 * Define PowerPC target-specific operand constraints.
      4 * Copyright (c) 2021 Linaro
      5 */
      6
      7/*
      8 * Define constraint letters for register sets:
      9 * REGS(letter, register_mask)
     10 */
     11REGS('r', ALL_GENERAL_REGS)
     12REGS('v', ALL_VECTOR_REGS)
     13REGS('A', 1u << TCG_REG_R3)
     14REGS('B', 1u << TCG_REG_R4)
     15REGS('C', 1u << TCG_REG_R5)
     16REGS('D', 1u << TCG_REG_R6)
     17REGS('L', ALL_QLOAD_REGS)
     18REGS('S', ALL_QSTORE_REGS)
     19
     20/*
     21 * Define constraint letters for constants:
     22 * CONST(letter, TCG_CT_CONST_* bit set)
     23 */
     24CONST('I', TCG_CT_CONST_S16)
     25CONST('J', TCG_CT_CONST_U16)
     26CONST('M', TCG_CT_CONST_MONE)
     27CONST('T', TCG_CT_CONST_S32)
     28CONST('U', TCG_CT_CONST_U32)
     29CONST('W', TCG_CT_CONST_WSZ)
     30CONST('Z', TCG_CT_CONST_ZERO)