cachepc-qemu

Fork of AMDESE/qemu with changes for cachepc side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-qemu
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test-i386-bmi2.c (1356B)


      1/* See if various BMI2 instructions give expected results */
      2#include <assert.h>
      3#include <stdint.h>
      4
      5int main(int argc, char *argv[]) {
      6    uint64_t ehlo = 0x202020204f4c4845ull;
      7    uint64_t mask = 0xa080800302020001ull;
      8    uint32_t result32;
      9
     10#ifdef __x86_64
     11    uint64_t result64;
     12
     13    /* 64 bits */
     14    asm volatile ("pextq   %2, %1, %0" : "=r"(result64) : "r"(ehlo), "m"(mask));
     15    assert(result64 == 133);
     16
     17    asm volatile ("pdepq   %2, %1, %0" : "=r"(result64) : "r"(result64), "m"(mask));
     18    assert(result64 == (ehlo & mask));
     19
     20    asm volatile ("pextq   %2, %1, %0" : "=r"(result64) : "r"(-1ull), "m"(mask));
     21    assert(result64 == 511); /* mask has 9 bits set */
     22
     23    asm volatile ("pdepq   %2, %1, %0" : "=r"(result64) : "r"(-1ull), "m"(mask));
     24    assert(result64 == mask);
     25#endif
     26
     27    /* 32 bits */
     28    asm volatile ("pextl   %2, %k1, %k0" : "=r"(result32) : "r"((uint32_t) ehlo), "m"(mask));
     29    assert(result32 == 5);
     30
     31    asm volatile ("pdepl   %2, %k1, %k0" : "=r"(result32) : "r"(result32), "m"(mask));
     32    assert(result32 == (uint32_t)(ehlo & mask));
     33
     34    asm volatile ("pextl   %2, %k1, %k0" : "=r"(result32) : "r"(-1ull), "m"(mask));
     35    assert(result32 == 7); /* mask has 3 bits set */
     36
     37    asm volatile ("pdepl   %2, %k1, %k0" : "=r"(result32) : "r"(-1ull), "m"(mask));
     38    assert(result32 == (uint32_t)mask);
     39
     40    return 0;
     41}
     42