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96<div class="contents"> 97<div class="textblock"><code>#include <<a class="el" href="stdint_8h_source.html">stdint.h</a>></code><br /> 98<code>#include <types.h></code><br /> 99</div> 100<p><a href="isr_8h_source.html">Go to the source code of this file.</a></p> 101<table class="memberdecls"> 102<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="nested-classes"></a> 103Data Structures</h2></td></tr> 104<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="structisr__vector__t.html">isr_vector_t</a></td></tr> 105<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr> 106<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="structisr__nested__vector__t.html">isr_nested_vector_t</a></td></tr> 107<tr class="separator:"><td class="memSeparator" colspan="2"> </td></tr> 108</table><table class="memberdecls"> 109<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a> 110Macros</h2></td></tr> 111<tr class="memitem:a2cf2cba8468992868fe1f6b6448ffae2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="isr_8h.html#a2cf2cba8468992868fe1f6b6448ffae2">VECTOR_STAT</a>   0x48</td></tr> 112<tr class="separator:a2cf2cba8468992868fe1f6b6448ffae2"><td class="memSeparator" colspan="2"> </td></tr> 113<tr class="memitem:a84ca82d76186433c1ec77fde7652b827"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="isr_8h.html#a84ca82d76186433c1ec77fde7652b827">VECTOR_TIMER</a>   0x50</td></tr> 114<tr class="separator:a84ca82d76186433c1ec77fde7652b827"><td class="memSeparator" colspan="2"> </td></tr> 115<tr class="memitem:a9c51a56a79576c33fcc98579bf7153a1"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="isr_8h.html#a9c51a56a79576c33fcc98579bf7153a1">VECTOR_SERIAL</a>   0x58</td></tr> 116<tr class="separator:a9c51a56a79576c33fcc98579bf7153a1"><td class="memSeparator" colspan="2"> </td></tr> 117<tr class="memitem:ac93f10ff354ca76f4030f64a8496303f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="isr_8h.html#ac93f10ff354ca76f4030f64a8496303f">VECTOR_JOYPAD</a>   0x60</td></tr> 118<tr class="separator:ac93f10ff354ca76f4030f64a8496303f"><td class="memSeparator" colspan="2"> </td></tr> 119<tr class="memitem:a73769fed9338af86fdb7df35d7b82620"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="isr_8h.html#a73769fed9338af86fdb7df35d7b82620">ISR_VECTOR</a>(ADDR, FUNC)   static const <a class="el" href="structisr__vector__t.html">isr_vector_t</a> <a class="el" href="asm_2types_8h.html#a66d3e9555a86fa871932c5f60834c67e">AT</a>((ADDR)) __ISR_ ## ADDR = {0xc3, (void *)&(FUNC)};</td></tr> 120<tr class="separator:a73769fed9338af86fdb7df35d7b82620"><td class="memSeparator" colspan="2"> </td></tr> 121<tr class="memitem:a78f9ef588aaf221023e48899898d566b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="isr_8h.html#a78f9ef588aaf221023e48899898d566b">ISR_NESTED_VECTOR</a>(ADDR, FUNC)   static const <a class="el" href="structisr__nested__vector__t.html">isr_nested_vector_t</a> <a class="el" href="asm_2types_8h.html#a66d3e9555a86fa871932c5f60834c67e">AT</a>((ADDR)) __ISR_ ## ADDR = {{0xfb, 0xc3}, (void *)&(FUNC)};</td></tr> 122<tr class="separator:a78f9ef588aaf221023e48899898d566b"><td class="memSeparator" colspan="2"> </td></tr> 123</table><table class="memberdecls"> 124<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="typedef-members"></a> 125Typedefs</h2></td></tr> 126<tr class="memitem:a40dca48ca391581d7f67d8697533cf30"><td class="memItemLeft" align="right" valign="top">typedef struct <a class="el" href="structisr__vector__t.html">isr_vector_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="isr_8h.html#a40dca48ca391581d7f67d8697533cf30">isr_vector_t</a></td></tr> 127<tr class="separator:a40dca48ca391581d7f67d8697533cf30"><td class="memSeparator" colspan="2"> </td></tr> 128<tr class="memitem:a99e64ac886740db0eb63d8ed0235b5c7"><td class="memItemLeft" align="right" valign="top">typedef struct <a class="el" href="structisr__nested__vector__t.html">isr_nested_vector_t</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="isr_8h.html#a99e64ac886740db0eb63d8ed0235b5c7">isr_nested_vector_t</a></td></tr> 129<tr class="separator:a99e64ac886740db0eb63d8ed0235b5c7"><td class="memSeparator" colspan="2"> </td></tr> 130</table> 131<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2> 132<div class="textblock"><p>Macros for creating raw interrupt service routines (ISRs) which do not use the default GBDK ISR dispatcher.</p> 133<p>Handlers installed this way will have less overhead than ones which use the GBDK ISR dispatcher. </p> 134</div><h2 class="groupheader">Macro Definition Documentation</h2> 135<a id="a2cf2cba8468992868fe1f6b6448ffae2"></a> 136<h2 class="memtitle"><span class="permalink"><a href="#a2cf2cba8468992868fe1f6b6448ffae2">◆ </a></span>VECTOR_STAT</h2> 137 138<div class="memitem"> 139<div class="memproto"> 140 <table class="memname"> 141 <tr> 142 <td class="memname">#define VECTOR_STAT   0x48</td> 143 </tr> 144 </table> 145</div><div class="memdoc"> 146<p>Address for the STAT interrupt vector </p> 147 148</div> 149</div> 150<a id="a84ca82d76186433c1ec77fde7652b827"></a> 151<h2 class="memtitle"><span class="permalink"><a href="#a84ca82d76186433c1ec77fde7652b827">◆ </a></span>VECTOR_TIMER</h2> 152 153<div class="memitem"> 154<div class="memproto"> 155 <table class="memname"> 156 <tr> 157 <td class="memname">#define VECTOR_TIMER   0x50</td> 158 </tr> 159 </table> 160</div><div class="memdoc"> 161<p>Address for the TIMER interrupt vector </p> 162 163</div> 164</div> 165<a id="a9c51a56a79576c33fcc98579bf7153a1"></a> 166<h2 class="memtitle"><span class="permalink"><a href="#a9c51a56a79576c33fcc98579bf7153a1">◆ </a></span>VECTOR_SERIAL</h2> 167 168<div class="memitem"> 169<div class="memproto"> 170 <table class="memname"> 171 <tr> 172 <td class="memname">#define VECTOR_SERIAL   0x58</td> 173 </tr> 174 </table> 175</div><div class="memdoc"> 176<p>Address for the SERIAL interrupt vector </p> 177 178</div> 179</div> 180<a id="ac93f10ff354ca76f4030f64a8496303f"></a> 181<h2 class="memtitle"><span class="permalink"><a href="#ac93f10ff354ca76f4030f64a8496303f">◆ </a></span>VECTOR_JOYPAD</h2> 182 183<div class="memitem"> 184<div class="memproto"> 185 <table class="memname"> 186 <tr> 187 <td class="memname">#define VECTOR_JOYPAD   0x60</td> 188 </tr> 189 </table> 190</div><div class="memdoc"> 191<p>Address for the JOYPAD interrupt vector </p> 192 193</div> 194</div> 195<a id="a73769fed9338af86fdb7df35d7b82620"></a> 196<h2 class="memtitle"><span class="permalink"><a href="#a73769fed9338af86fdb7df35d7b82620">◆ </a></span>ISR_VECTOR</h2> 197 198<div class="memitem"> 199<div class="memproto"> 200 <table class="memname"> 201 <tr> 202 <td class="memname">#define ISR_VECTOR</td> 203 <td>(</td> 204 <td class="paramtype"> </td> 205 <td class="paramname">ADDR, </td> 206 </tr> 207 <tr> 208 <td class="paramkey"></td> 209 <td></td> 210 <td class="paramtype"> </td> 211 <td class="paramname">FUNC </td> 212 </tr> 213 <tr> 214 <td></td> 215 <td>)</td> 216 <td></td><td>   static const <a class="el" href="structisr__vector__t.html">isr_vector_t</a> <a class="el" href="asm_2types_8h.html#a66d3e9555a86fa871932c5f60834c67e">AT</a>((ADDR)) __ISR_ ## ADDR = {0xc3, (void *)&(FUNC)};</td> 217 </tr> 218 </table> 219</div><div class="memdoc"> 220<p>Creates an interrupt vector at the given address for a raw interrupt service routine (which does not use the GBDK ISR dispatcher)</p> 221<dl class="params"><dt>Parameters</dt><dd> 222 <table class="params"> 223 <tr><td class="paramname">ADDR</td><td>Address of the interrupt vector, any of: <a class="el" href="isr_8h.html#a2cf2cba8468992868fe1f6b6448ffae2">VECTOR_STAT</a>, <a class="el" href="isr_8h.html#a84ca82d76186433c1ec77fde7652b827">VECTOR_TIMER</a>, <a class="el" href="isr_8h.html#a9c51a56a79576c33fcc98579bf7153a1">VECTOR_SERIAL</a>, <a class="el" href="isr_8h.html#ac93f10ff354ca76f4030f64a8496303f">VECTOR_JOYPAD</a> </td></tr> 224 <tr><td class="paramname">FUNC</td><td>ISR function supplied by the user</td></tr> 225 </table> 226 </dd> 227</dl> 228<p>This cannot be used with the VBLANK interrupt.</p> 229<p>Do not use this in combination with interrupt installers that rely on the default GBDK ISR dispatcher such as <a class="el" href="gb_8h.html#a028d1a2e820951bb4f103d6469975ffb">add_TIM()</a>, <a class="el" href="gb_8h.html#a142f6c7755fce8b1148faf658d8ec147">remove_TIM()</a> (and the same for all other interrupts).</p> 230<p>Example: </p><div class="fragment"><div class="line"><span class="preprocessor">#include <<a class="code" href="isr_8h.html">gb/isr.h</a>></span></div> 231<div class="line"> </div> 232<div class="line"><span class="keywordtype">void</span> TimerISR() __critical __interrupt {</div> 233<div class="line"><span class="comment">// some ISR code here</span></div> 234<div class="line">}</div> 235<div class="line"> </div> 236<div class="line"><a class="code" href="isr_8h.html#a73769fed9338af86fdb7df35d7b82620">ISR_VECTOR</a>(<a class="code" href="isr_8h.html#a84ca82d76186433c1ec77fde7652b827">VECTOR_TIMER</a>, TimerISR)</div> 237</div><!-- fragment --><dl class="section see"><dt>See also</dt><dd><a class="el" href="isr_8h.html#a78f9ef588aaf221023e48899898d566b">ISR_NESTED_VECTOR</a>, <a class="el" href="sms_8h.html#aefda0091b2934571a11e07b512735f50">set_interrupts</a> </dd></dl> 238 239</div> 240</div> 241<a id="a78f9ef588aaf221023e48899898d566b"></a> 242<h2 class="memtitle"><span class="permalink"><a href="#a78f9ef588aaf221023e48899898d566b">◆ </a></span>ISR_NESTED_VECTOR</h2> 243 244<div class="memitem"> 245<div class="memproto"> 246 <table class="memname"> 247 <tr> 248 <td class="memname">#define ISR_NESTED_VECTOR</td> 249 <td>(</td> 250 <td class="paramtype"> </td> 251 <td class="paramname">ADDR, </td> 252 </tr> 253 <tr> 254 <td class="paramkey"></td> 255 <td></td> 256 <td class="paramtype"> </td> 257 <td class="paramname">FUNC </td> 258 </tr> 259 <tr> 260 <td></td> 261 <td>)</td> 262 <td></td><td>   static const <a class="el" href="structisr__nested__vector__t.html">isr_nested_vector_t</a> <a class="el" href="asm_2types_8h.html#a66d3e9555a86fa871932c5f60834c67e">AT</a>((ADDR)) __ISR_ ## ADDR = {{0xfb, 0xc3}, (void *)&(FUNC)};</td> 263 </tr> 264 </table> 265</div><div class="memdoc"> 266<p>Creates an interrupt vector at the given address for a raw interrupt service routine allowing nested interrupts</p> 267<dl class="params"><dt>Parameters</dt><dd> 268 <table class="params"> 269 <tr><td class="paramname">ADDR</td><td>Address of the interrupt vector, any of: <a class="el" href="isr_8h.html#a2cf2cba8468992868fe1f6b6448ffae2">VECTOR_STAT</a>, <a class="el" href="isr_8h.html#a84ca82d76186433c1ec77fde7652b827">VECTOR_TIMER</a>, <a class="el" href="isr_8h.html#a9c51a56a79576c33fcc98579bf7153a1">VECTOR_SERIAL</a>, <a class="el" href="isr_8h.html#ac93f10ff354ca76f4030f64a8496303f">VECTOR_JOYPAD</a> </td></tr> 270 <tr><td class="paramname">FUNC</td><td>ISR function</td></tr> 271 </table> 272 </dd> 273</dl> 274<p>This cannot be used with the VBLANK interrupt</p> 275<dl class="section see"><dt>See also</dt><dd><a class="el" href="isr_8h.html#a73769fed9338af86fdb7df35d7b82620">ISR_VECTOR</a> </dd></dl> 276 277</div> 278</div> 279<h2 class="groupheader">Typedef Documentation</h2> 280<a id="a40dca48ca391581d7f67d8697533cf30"></a> 281<h2 class="memtitle"><span class="permalink"><a href="#a40dca48ca391581d7f67d8697533cf30">◆ </a></span>isr_vector_t</h2> 282 283<div class="memitem"> 284<div class="memproto"> 285 <table class="memname"> 286 <tr> 287 <td class="memname">typedef struct <a class="el" href="structisr__vector__t.html">isr_vector_t</a> <a class="el" href="structisr__vector__t.html">isr_vector_t</a></td> 288 </tr> 289 </table> 290</div><div class="memdoc"> 291 292</div> 293</div> 294<a id="a99e64ac886740db0eb63d8ed0235b5c7"></a> 295<h2 class="memtitle"><span class="permalink"><a href="#a99e64ac886740db0eb63d8ed0235b5c7">◆ </a></span>isr_nested_vector_t</h2> 296 297<div class="memitem"> 298<div class="memproto"> 299 <table class="memname"> 300 <tr> 301 <td class="memname">typedef struct <a class="el" href="structisr__nested__vector__t.html">isr_nested_vector_t</a> <a class="el" href="structisr__nested__vector__t.html">isr_nested_vector_t</a></td> 302 </tr> 303 </table> 304</div><div class="memdoc"> 305 306</div> 307</div> 308</div><!-- contents --> 309</div><!-- doc-content --> 310<div class="ttc" id="aisr_8h_html_a84ca82d76186433c1ec77fde7652b827"><div class="ttname"><a href="isr_8h.html#a84ca82d76186433c1ec77fde7652b827">VECTOR_TIMER</a></div><div class="ttdeci">#define VECTOR_TIMER</div><div class="ttdef"><b>Definition:</b> isr.h:17</div></div> 311<div class="ttc" id="aisr_8h_html_a73769fed9338af86fdb7df35d7b82620"><div class="ttname"><a href="isr_8h.html#a73769fed9338af86fdb7df35d7b82620">ISR_VECTOR</a></div><div class="ttdeci">#define ISR_VECTOR(ADDR, FUNC)</div><div class="ttdef"><b>Definition:</b> isr.h:52</div></div> 312<div class="ttc" id="aisr_8h_html"><div class="ttname"><a href="isr_8h.html">isr.h</a></div></div> 313<!-- HTML footer for doxygen 1.8.14--> 314<!-- start footer part --> 315<div id="nav-path" class="navpath"><!-- id is needed for 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