sms_set_1bpp_data.s (1889B)
1 .include "global.s" 2 3 .title "VRAM utilities" 4 .module VRAMUtils 5 6 .ez80 7 8 .area _HOME 9 10; void set_tile_1bpp_data(uint16_t start, uint16_t ntiles, const void *src, uint16_t colors) __z88dk_callee __preserves_regs(iyh,iyl); 11_set_tile_1bpp_data:: 12 pop de ; pop ret address 13 pop hl 14 15 add hl, hl 16 add hl, hl 17 add hl, hl 18 add hl, hl 19 add hl, hl 20 21 ld bc, #.VDP_VRAM 22 add hl, bc 23 24 DISABLE_VBLANK_COPY ; switch OFF copy shadow SAT 25 26 VDP_WRITE_CMD h, l 27 28 ex de, hl ; hl = ret 29 30 pop bc ; bc = ntiles 31 pop de ; de = src 32 ex (sp), hl ; hl = palette 33 34 ex de, hl 35 36 inc b 37 inc c 38 push ix 39 40 ld ixh, d 41 ld ixl, e ; ix == palette 42 43 push iy 44 ld iy, #-4 45 add iy, sp 46 ld sp, iy 47 push bc 48 jr 2$ 49 501$: 51 ex (sp), hl 52 53 ld d, #8 546$: 55 ld c, (hl) 56 inc hl 57 58 ld e, #8 595$: 60 srl c 61 62 jr c, 10$ 63 ld a, ixh 64 jr 11$ 6510$: 66 ld a, ixl 6711$: 68 rra 69 rr 0 (iy) 70 rra 71 rr 1 (iy) 72 rra 73 rr 2 (iy) 74 rra 75 rr 3 (iy) 76 77 dec e 78 jr nz, 5$ 79 80 ld a, 0 (iy) 81 out (.VDP_DATA), a 82 ld a, 1 (iy) 83 out (.VDP_DATA), a 84 ld a, 2 (iy) 85 out (.VDP_DATA), a 86 ld a, 3 (iy) 87 out (.VDP_DATA), a 88 89 dec d 90 jr nz, 6$ 912$: 92 ex (sp), hl 93 94 dec l 95 jr nz, 1$ 96 97 dec h 98 jr nz, 1$ 99 100 ld iy, #6 101 add iy, sp 102 ld sp, iy 103 pop iy 104 pop ix 105 106 ENABLE_VBLANK_COPY ; switch ON copy shadow SAT 107 108 ret