lws-spi.h (2491B)
1/* 2 * Generic I2C ops 3 * 4 * Copyright (C) 2019 - 2020 Andy Green <andy@warmcat.com> 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to 8 * deal in the Software without restriction, including without limitation the 9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or 10 * sell copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 22 * IN THE SOFTWARE. 23 * 24 * This is like an abstract class for spi, a real implementation provides 25 * functions for the ops that use the underlying OS arrangements. 26 * 27 * It uses descriptor / queuing semantics but eg the GPIO BB implementantion is 28 * synchronous. 29 */ 30 31#if !defined(__LWS_SPI_H__) 32#define __LWS_SPI_H__ 33 34#include <stdint.h> 35#include <stddef.h> 36 37typedef int (*lws_spi_cb_t)(void *opaque); 38 39enum { 40 LWSSPIMODE_CPOL = (1 << 0), 41 LWSSPIMODE_CPHA = (1 << 1), 42 43 LWS_SPI_BUSMODE_CLK_IDLE_LOW_SAMP_RISING = 0, 44 LWS_SPI_BUSMODE_CLK_IDLE_HIGH_SAMP_RISING = LWSSPIMODE_CPOL, 45 LWS_SPI_BUSMODE_CLK_IDLE_LOW_SAMP_FALLING = LWSSPIMODE_CPHA, 46 LWS_SPI_BUSMODE_CLK_IDLE_HIGH_SAMP_FALLING = LWSSPIMODE_CPHA | 47 LWSSPIMODE_CPOL, 48 49 LWS_SPI_TXN_HALF_DUPLEX_DISCRETE = 0, 50 /**< separate MISO and MOSI, but only either MISO or MOSI has data at 51 * one time... i2c style in SPI */ 52}; 53 54typedef struct lws_spi_desc { 55 const uint8_t *src; 56 const uint8_t *data; 57 uint8_t *dest; 58 void *opaque; 59 lws_spi_cb_t completion_cb; 60 uint16_t count_cmd; 61 uint16_t count_write; 62 uint16_t count_read; 63 uint8_t txn_type; 64 uint8_t channel; 65} lws_spi_desc_t; 66 67typedef struct lws_spi_ops { 68 int (*init)(const struct lws_spi_ops *ctx); 69 int (*queue)(const struct lws_spi_ops *ctx, const lws_spi_desc_t *desc); 70 uint8_t bus_mode; 71} lws_spi_ops_t; 72 73#endif