summaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
* Properly clear line when ip gets assignedHEADmasterLouis Burda2024-11-101-1/+3
|
* Remove testLouis Burda2024-11-091-1/+1
|
* Add test modeLouis Burda2024-11-094-9/+27
|
* Use 5.1K resistor instead of 4.7K for vregLouis Burda2024-11-093-3/+3
|
* Add http server to control lightsLouis Burda2024-11-052-30/+109
|
* Implement wifi connectionLouis Burda2024-11-059-25/+282
|
* Fix usbc port tolerances and silk screenLouis Burda2024-10-276-4326/+1357
|
* Add v-cut separated dual usb boardLouis Burda2024-09-2154-52479/+21008
|
* Rev 0Louis Burda2024-08-3044-10548/+35050
|
* Switch to open drain driving (still has ESD issue)Louis Burda2024-08-1932-4942/+40782
|
* Assign footprints and add solder jumperLouis Burda2024-08-175-595/+10480
|
* Adjust tolerancesLouis Burda2024-08-171-53/+78
|
* Adjust usbc board dimensions and move into wall for accessLouis Burda2024-08-151-11/+19
|
* Revise design with usbc board, oled and antennaLouis Burda2024-08-141-23/+126
|
* Add blink test firmware, docs and new schematic iterationsLouis Burda2024-08-1329-64/+15630
|
* Initial model designLouis Burda2024-07-148-0/+97425