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| author | Thierry Reding <treding@nvidia.com> | 2020-09-17 12:07:41 +0200 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2020-09-17 17:47:18 +0200 |
| commit | 2778aca0b429dff1925c882da6ec4170ff25e971 (patch) | |
| tree | 5cd84627568e1e5f1fb33a8374a37de7e6bd3143 | |
| parent | 24989476352599c68e91eb601a6751fd250a458f (diff) | |
| download | cachepc-linux-2778aca0b429dff1925c882da6ec4170ff25e971.tar.gz cachepc-linux-2778aca0b429dff1925c882da6ec4170ff25e971.zip | |
dt-bindings: misc: tegra186-misc: Add Tegra234 support
The MISC block found on Tegra234 is mostly similar to the one on
Tegra194 but supports slightly different register sets that make
it incompatible.
Signed-off-by: Thierry Reding <treding@nvidia.com>
| -rw-r--r-- | Documentation/devicetree/bindings/misc/nvidia,tegra186-misc.txt | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/misc/nvidia,tegra186-misc.txt b/Documentation/devicetree/bindings/misc/nvidia,tegra186-misc.txt index 111dfac70ea7..43d777ed8316 100644 --- a/Documentation/devicetree/bindings/misc/nvidia,tegra186-misc.txt +++ b/Documentation/devicetree/bindings/misc/nvidia,tegra186-misc.txt @@ -7,6 +7,7 @@ Required properties: - compatible: Must be: - Tegra186: "nvidia,tegra186-misc" - Tegra194: "nvidia,tegra194-misc" + - Tegra234: "nvidia,tegra234-misc" - reg: Should contain 2 entries: The first entry gives the physical address and length of the register region which contains revision and debug features. The second entry specifies the physical address and length |