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authorNiklas Söderlund <niklas.soderlund+renesas@ragnatech.se>2018-11-28 17:18:27 +0100
committerUlf Hansson <ulf.hansson@linaro.org>2018-12-17 08:26:24 +0100
commit164691aae88d7fb75c1b2a3e83737b2a52c2f956 (patch)
tree49546dfb0ac45a8eb68dc2c8100abb0577f43f44 /include/linux/debugobjects.h
parent202367cb8d09c5b003ba4a07860ecd0ea50148b8 (diff)
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mmc: renesas_sdhi: handle 4tap hs400 mode quirk based on SoC revision
Latest datasheet makes it clear that not all ES revisions of the H3 and M3-W have the 4-tap HS400 mode quirk, currently the quirk is set unconditionally for these two SoCs. Prepare to handle the quirk based on SoC revision instead of compatibility value by using soc_device_match() and set the TMIO_MMC_HAVE_4TAP_HS400 flag explicitly. The reason for adding a new quirks struct instead of just a flag is that looking ahead it seems more quirks needs to be handled in a SoC revision basis. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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