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| author | Shayne Chen <shayne.chen@mediatek.com> | 2021-10-18 16:09:39 +0800 |
|---|---|---|
| committer | Felix Fietkau <nbd@nbd.name> | 2021-10-20 10:37:04 +0200 |
| commit | 16bff457dd33aa0997f7f8aea1c843e05c766bfb (patch) | |
| tree | c8945e881b62b2869b3dee1da79fdd2c9c74e97b /include/linux/timerqueue.h | |
| parent | bbf77f6ccebfb3511b1a2a2e7e7b8f9c235fcf73 (diff) | |
| download | cachepc-linux-16bff457dd33aa0997f7f8aea1c843e05c766bfb.tar.gz cachepc-linux-16bff457dd33aa0997f7f8aea1c843e05c766bfb.zip | |
mt76: mt7915: rework mt7915_mcu_sta_muru_tlv()
Re-order and modify conditions for MU DL/UL and ofdma DL fields, and
also clean up some unnecessary zero settings.
Signed-off-by: Shayne Chen <shayne.chen@mediatek.com>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Diffstat (limited to 'include/linux/timerqueue.h')
0 files changed, 0 insertions, 0 deletions