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| author | Parav Pandit <parav@nvidia.com> | 2021-02-19 12:06:54 +0200 |
|---|---|---|
| committer | Saeed Mahameed <saeedm@nvidia.com> | 2021-04-02 16:13:06 -0700 |
| commit | 6b30b6d4d36c978e0ab0f22e85bf3c646732e98b (patch) | |
| tree | 218be75a0b8e2807f1e45cb6cf487743333cf4b8 /include/linux/timerqueue.h | |
| parent | 97d85aba2543af790aaf7f4eb1c9f643a1718519 (diff) | |
| download | cachepc-linux-6b30b6d4d36c978e0ab0f22e85bf3c646732e98b.tar.gz cachepc-linux-6b30b6d4d36c978e0ab0f22e85bf3c646732e98b.zip | |
net/mlx5: Allocate rate limit table when rate is configured
A device supports 128 rate limiters. A static table allocation consumes
8KB of memory even when rate is not configured.
Instead, allocate the table when at least one rate is configured.
Signed-off-by: Parav Pandit <parav@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
Diffstat (limited to 'include/linux/timerqueue.h')
0 files changed, 0 insertions, 0 deletions