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| author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-10-17 11:32:57 +0200 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-10-17 22:38:34 +0200 |
| commit | c630119f43471a8ece356b01dabf07f944f453b3 (patch) | |
| tree | cc2f1eed02135e76d96bdbe0a4a76bc5675f1515 /include/linux/timerqueue.h | |
| parent | 905c27bb0de30dab178a54c06dc284177e24088a (diff) | |
| download | cachepc-linux-c630119f43471a8ece356b01dabf07f944f453b3.tar.gz cachepc-linux-c630119f43471a8ece356b01dabf07f944f453b3.zip | |
drm/i915: don't save/restore HWS_PGA reg for kms
We already do that as part of the ringbuffer re-setup at resume time.
Furthermore the register offset has moved on gen6+ around quite a bit,
and on ilk/gm45 we also need to restore the HWS reg for the bsd ring,
not just the render ring.
So again in kms mode this is only confusing a best, hence don't
bother.
v2: Fixup logic, noticed by Paulo Zanoni.
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Tested-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'include/linux/timerqueue.h')
0 files changed, 0 insertions, 0 deletions