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| author | Shukun Tan <tanshukun1@huawei.com> | 2020-01-20 15:30:07 +0800 |
|---|---|---|
| committer | Herbert Xu <herbert@gondor.apana.org.au> | 2020-02-13 16:58:08 +0800 |
| commit | de3daf4b4ad58d3c4110f437f4b2f3fc631a2d3a (patch) | |
| tree | e80ea8264e7b7bd23289f88e86a29a2c2e8a7144 /include/linux/timerqueue.h | |
| parent | eaebf4c3b103dfc3c00dd3b6d3966fb9e08777ce (diff) | |
| download | cachepc-linux-de3daf4b4ad58d3c4110f437f4b2f3fc631a2d3a.tar.gz cachepc-linux-de3daf4b4ad58d3c4110f437f4b2f3fc631a2d3a.zip | |
crypto: hisilicon - Configure zip RAS error type
Configure zip RAS error type in error handle initialization,
Where ECC 1bit is configured as CE error, others are NFE.
Signed-off-by: Shukun Tan <tanshukun1@huawei.com>
Reviewed-by: Zhou Wang <wangzhou1@hisilicon.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'include/linux/timerqueue.h')
0 files changed, 0 insertions, 0 deletions