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| author | Andrew Bresticker <abrestic@chromium.org> | 2015-04-28 18:13:01 -0700 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2015-05-06 14:45:18 +0200 |
| commit | abbc48e1c2a246d3d10393dec070e02ee150d0ae (patch) | |
| tree | 5834519581c0d0f95961fdef007237066d662513 /include/linux | |
| parent | a9ed9eb6345806917bae87b689a906e97415fd01 (diff) | |
| download | cachepc-linux-abbc48e1c2a246d3d10393dec070e02ee150d0ae.tar.gz cachepc-linux-abbc48e1c2a246d3d10393dec070e02ee150d0ae.zip | |
pinctrl: Add Pistachio SoC pin control binding document
Add a device-tree binding document for the pin controller present
on the IMG Pistachio SoC.
Signed-off-by: Damien Horsley <Damien.Horsley@imgtec.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@imgtec.com>
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'include/linux')
0 files changed, 0 insertions, 0 deletions