diff options
| author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-10-22 14:34:51 +0200 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-10-22 14:34:51 +0200 |
| commit | c2fb7916927e989ea424e61ce5fe617e54878827 (patch) | |
| tree | 02f9d5482075f8931637d82bb697a6470270136a /include/uapi/linux/ppdev.h | |
| parent | 29de6ce574870a0d3fd157afdbf51c0282e2bf63 (diff) | |
| parent | 6f0c0580b70c89094b3422ba81118c7b959c7556 (diff) | |
| download | cachepc-linux-c2fb7916927e989ea424e61ce5fe617e54878827.tar.gz cachepc-linux-c2fb7916927e989ea424e61ce5fe617e54878827.zip | |
Merge tag 'v3.7-rc2' into drm-intel-next-queued
Linux 3.7-rc2
Backmerge to solve two ugly conflicts:
- uapi. We've already added new ioctl definitions for -next. Do I need to say more?
- wc support gtt ptes. We've had to revert this for snb+ for 3.7 and
also fix a few other things in the code. Now we know how to make it
work on snb+, but to avoid losing the other fixes do the backmerge
first before re-enabling wc gtt ptes on snb+.
And a few other minor things, among them git getting confused in
intel_dp.c and seemingly causing a conflict out of nothing ...
Conflicts:
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_dp.c
drivers/gpu/drm/i915/intel_modes.c
include/drm/i915_drm.h
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'include/uapi/linux/ppdev.h')
| -rw-r--r-- | include/uapi/linux/ppdev.h | 99 |
1 files changed, 99 insertions, 0 deletions
diff --git a/include/uapi/linux/ppdev.h b/include/uapi/linux/ppdev.h new file mode 100644 index 000000000000..dc18c5d23ebe --- /dev/null +++ b/include/uapi/linux/ppdev.h @@ -0,0 +1,99 @@ +/* + * linux/include/linux/ppdev.h + * + * User-space parallel port device driver (header file). + * + * Copyright (C) 1998-9 Tim Waugh <tim@cyberelk.demon.co.uk> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + * + * Added PPGETTIME/PPSETTIME, Fred Barnes, 1999 + * Added PPGETMODES/PPGETMODE/PPGETPHASE, Fred Barnes <frmb2@ukc.ac.uk>, 03/01/2001 + */ + +#define PP_IOCTL 'p' + +/* Set mode for read/write (e.g. IEEE1284_MODE_EPP) */ +#define PPSETMODE _IOW(PP_IOCTL, 0x80, int) + +/* Read status */ +#define PPRSTATUS _IOR(PP_IOCTL, 0x81, unsigned char) +#define PPWSTATUS OBSOLETE__IOW(PP_IOCTL, 0x82, unsigned char) + +/* Read/write control */ +#define PPRCONTROL _IOR(PP_IOCTL, 0x83, unsigned char) +#define PPWCONTROL _IOW(PP_IOCTL, 0x84, unsigned char) + +struct ppdev_frob_struct { + unsigned char mask; + unsigned char val; +}; +#define PPFCONTROL _IOW(PP_IOCTL, 0x8e, struct ppdev_frob_struct) + +/* Read/write data */ +#define PPRDATA _IOR(PP_IOCTL, 0x85, unsigned char) +#define PPWDATA _IOW(PP_IOCTL, 0x86, unsigned char) + +/* Read/write econtrol (not used) */ +#define PPRECONTROL OBSOLETE__IOR(PP_IOCTL, 0x87, unsigned char) +#define PPWECONTROL OBSOLETE__IOW(PP_IOCTL, 0x88, unsigned char) + +/* Read/write FIFO (not used) */ +#define PPRFIFO OBSOLETE__IOR(PP_IOCTL, 0x89, unsigned char) +#define PPWFIFO OBSOLETE__IOW(PP_IOCTL, 0x8a, unsigned char) + +/* Claim the port to start using it */ +#define PPCLAIM _IO(PP_IOCTL, 0x8b) + +/* Release the port when you aren't using it */ +#define PPRELEASE _IO(PP_IOCTL, 0x8c) + +/* Yield the port (release it if another driver is waiting, + * then reclaim) */ +#define PPYIELD _IO(PP_IOCTL, 0x8d) + +/* Register device exclusively (must be before PPCLAIM). */ +#define PPEXCL _IO(PP_IOCTL, 0x8f) + +/* Data line direction: non-zero for input mode. */ +#define PPDATADIR _IOW(PP_IOCTL, 0x90, int) + +/* Negotiate a particular IEEE 1284 mode. */ +#define PPNEGOT _IOW(PP_IOCTL, 0x91, int) + +/* Set control lines when an interrupt occurs. */ +#define PPWCTLONIRQ _IOW(PP_IOCTL, 0x92, unsigned char) + +/* Clear (and return) interrupt count. */ +#define PPCLRIRQ _IOR(PP_IOCTL, 0x93, int) + +/* Set the IEEE 1284 phase that we're in (e.g. IEEE1284_PH_FWD_IDLE) */ +#define PPSETPHASE _IOW(PP_IOCTL, 0x94, int) + +/* Set and get port timeout (struct timeval's) */ +#define PPGETTIME _IOR(PP_IOCTL, 0x95, struct timeval) +#define PPSETTIME _IOW(PP_IOCTL, 0x96, struct timeval) + +/* Get available modes (what the hardware can do) */ +#define PPGETMODES _IOR(PP_IOCTL, 0x97, unsigned int) + +/* Get the current mode and phaze */ +#define PPGETMODE _IOR(PP_IOCTL, 0x98, int) +#define PPGETPHASE _IOR(PP_IOCTL, 0x99, int) + +/* get/set flags */ +#define PPGETFLAGS _IOR(PP_IOCTL, 0x9a, int) +#define PPSETFLAGS _IOW(PP_IOCTL, 0x9b, int) + +/* flags visible to the world */ +#define PP_FASTWRITE (1<<2) +#define PP_FASTREAD (1<<3) +#define PP_W91284PIC (1<<4) + +/* only masks user-visible flags */ +#define PP_FLAGMASK (PP_FASTWRITE | PP_FASTREAD | PP_W91284PIC) + + |
