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| author | Vasant Hegde <vasant.hegde@amd.com> | 2022-07-06 17:07:59 +0530 |
|---|---|---|
| committer | Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> | 2022-07-13 17:27:20 -0500 |
| commit | ff06762eac600947f21e727e8496fb58d5471eae (patch) | |
| tree | 62e80fe5f91a9d7b0096985bd8fb2c4df1040a4e /include/uapi/linux | |
| parent | 466da51693d4ce654557c88428eb8af67cf4ffec (diff) | |
| download | cachepc-linux-ff06762eac600947f21e727e8496fb58d5471eae.tar.gz cachepc-linux-ff06762eac600947f21e727e8496fb58d5471eae.zip | |
iommu/amd: Introduce per PCI segment unity map list
Newer AMD systems can support multiple PCI segments. In order to support
multiple PCI segments IVMD table in IVRS structure is enhanced to
include pci segment id. Update ivmd_header structure to include "pci_seg".
Also introduce per PCI segment unity map list. It will replace global
amd_iommu_unity_map list.
Note that we have used "reserved" field in IVMD table to include "pci_seg
id" which was set to zero. It will take care of backward compatibility
(new kernel will work fine on older systems).
Co-developed-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Signed-off-by: Vasant Hegde <vasant.hegde@amd.com>
Link: https://lore.kernel.org/r/20220706113825.25582-10-vasant.hegde@amd.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'include/uapi/linux')
0 files changed, 0 insertions, 0 deletions