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| author | Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com> | 2019-08-12 15:36:45 +0530 |
|---|---|---|
| committer | Marc Kleine-Budde <mkl@pengutronix.de> | 2019-08-13 17:32:19 +0200 |
| commit | 9d06bcb9aa48dc4fc474dc8441a036bc4a090270 (patch) | |
| tree | 38e8f314cc66d0ed10f20de5bafb8ae67272c7ea /include | |
| parent | e6997dd2688403bf8f760bd9fd7ddb5c654bc8bd (diff) | |
| download | cachepc-linux-9d06bcb9aa48dc4fc474dc8441a036bc4a090270.tar.gz cachepc-linux-9d06bcb9aa48dc4fc474dc8441a036bc4a090270.zip | |
can: xilinx_can: xcan_rx_fifo_get_next_frame(): fix FSR register FL and RI mask values for canfd 2.0
For CANFD 2.0 IP configuration existing driver is using incorrect mask
values for FSR register FL and RI fields.
Fixes: c223da6 ("can: xilinx_can: Add support for CANFD FD frames")
Signed-off-by: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com>
Acked-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions