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| author | Louis Burda <quent.burda@gmail.com> | 2023-02-06 15:42:46 -0600 |
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| committer | Louis Burda <quent.burda@gmail.com> | 2023-02-06 15:45:46 -0600 |
| commit | c12f2b990c7dd7cd6c36e50b0aa71bfad95b4188 (patch) | |
| tree | 05863e56b2cd9de1c560a71efada6405ca96d619 /samples/livepatch/git@git.sinitax.com:sinitax | |
| parent | 1629595c7ee3cc336b5685c9c3630e7f9a11648c (diff) | |
| download | cachepc-linux-c12f2b990c7dd7cd6c36e50b0aa71bfad95b4188.tar.gz cachepc-linux-c12f2b990c7dd7cd6c36e50b0aa71bfad95b4188.zip | |
Save registers to xmm to lower baseline counts and avoid timing issues with apic_oneshot
Swapping general-purpose registers with xmm registers should be constant-time, while writing and reading from memory after prime will cause cache misses with varying servicing time. This added uncertainty decreases stepping accuracy with apic.
Diffstat (limited to 'samples/livepatch/git@git.sinitax.com:sinitax')
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