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authorJoshua Aberback <joshua.aberback@amd.com>2019-04-29 17:21:19 -0400
committerAlex Deucher <alexander.deucher@amd.com>2019-06-22 09:34:07 -0500
commit3972c3508594310eb868f0e57c44cf0b6fccf7b2 (patch)
treeac53e14b0ca868b1fbbb14bba24149961c3c02b9 /scripts/decode_stacktrace.sh
parent97bda0322b8a91aa8d534763e709571b2334e585 (diff)
downloadcachepc-linux-3972c3508594310eb868f0e57c44cf0b6fccf7b2.tar.gz
cachepc-linux-3972c3508594310eb868f0e57c44cf0b6fccf7b2.zip
drm/amd/display: Program VTG params after programming Global Sync for DCN2
[Why] VTG has a parameter FP2, which is defined as: if VSTARTUP is before VSYNC: FP2 = number of lines in between VSTARTUP and VSYNC else FP2 = 0 Currently, FP2 is only programmed during "program_timing". However, the position of VSTARTUP is affected by the prefetching requirements on all pipes, so the position might change when we do memory request control on another pipe, so we need to make sure that FP2 stays up-to-date whenever we adjust VSTARTUP. [How] - refactor VTG_CONTROL programming into a new function "set_vtg_params" - call it after calling "program_global_sync" - make sure it's called after because it relies on the cached dlg params Signed-off-by: Joshua Aberback <joshua.aberback@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Acked-by: Jun Lei <Jun.Lei@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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