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authorRobert Hancock <hancock@sedsystems.ca>2019-06-12 14:49:05 -0600
committerDavid S. Miller <davem@davemloft.net>2019-06-14 19:11:53 -0700
commit1fc33199185ddb2296270a7ae8114c40ab28b17b (patch)
treeab6df3d8ca9db9b932b100c5b5a27b5b65c2d783 /scripts/stackusage
parent7c86f20d15b7c1132e0c24358ce240ba4cb002b7 (diff)
downloadcachepc-linux-1fc33199185ddb2296270a7ae8114c40ab28b17b.tar.gz
cachepc-linux-1fc33199185ddb2296270a7ae8114c40ab28b17b.zip
net: dsa: microchip: Add PHY errata workarounds
The Silicon Errata and Data Sheet Clarification documents for the KSZ9477 series of chips describe a number of otherwise undocumented PHY register settings which are required to work around various chip errata. Apply these settings when initializing the PHY ports on these chips. Signed-off-by: Robert Hancock <hancock@sedsystems.ca> Signed-off-by: David S. Miller <davem@davemloft.net>
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