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| author | Nicholas Piggin <npiggin@gmail.com> | 2021-11-23 19:52:12 +1000 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2021-11-24 21:09:00 +1100 |
| commit | d55b1eccc7aa14a1750aecf271806365478ca805 (patch) | |
| tree | 0c1ad8328b39c01b9e2561031765f183ca7249ad /scripts/stackusage | |
| parent | 3e7b3379023dad2e78c3200373a6368f5d0ee599 (diff) | |
| download | cachepc-linux-d55b1eccc7aa14a1750aecf271806365478ca805.tar.gz cachepc-linux-d55b1eccc7aa14a1750aecf271806365478ca805.zip | |
KVM: PPC: Book3S HV P9: Restrict DSISR canary workaround to processors that require it
Use CPU_FTR_P9_RADIX_PREFETCH_BUG to apply the workaround, to test for
DD2.1 and below processors. This saves a mtSPR in guest entry.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20211123095231.1036501-35-npiggin@gmail.com
Diffstat (limited to 'scripts/stackusage')
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