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| author | Weihang Li <liweihang@huawei.com> | 2020-11-16 19:33:23 +0800 |
|---|---|---|
| committer | Jason Gunthorpe <jgg@nvidia.com> | 2020-11-26 15:24:47 -0400 |
| commit | fba429fcf9a5e0c4ec2523ecf4cf18bc0507fcbc (patch) | |
| tree | 5eb3df77b0821312f1d86f9de37b3224bdc3ce60 /tools/perf/scripts/python/bin/stackcollapse-record | |
| parent | 7406c0036f851ee1cd93cb08349f24b051b4cbf8 (diff) | |
| download | cachepc-linux-fba429fcf9a5e0c4ec2523ecf4cf18bc0507fcbc.tar.gz cachepc-linux-fba429fcf9a5e0c4ec2523ecf4cf18bc0507fcbc.zip | |
RDMA/hns: Fix missing fields in address vector
Traffic class and hop limit in address vector is not assigned from GRH,
but it will be filled into UD SQ WQE. So the hardware will get a wrong
value.
Fixes: 82e620d9c3a0 ("RDMA/hns: Modify the data structure of hns_roce_av")
Link: https://lore.kernel.org/r/1605526408-6936-3-git-send-email-liweihang@huawei.com
Signed-off-by: Weihang Li <liweihang@huawei.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-record')
0 files changed, 0 insertions, 0 deletions