diff options
| author | Dong Aisheng <aisheng.dong@nxp.com> | 2021-03-08 11:14:28 +0800 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2021-03-29 09:49:57 +0800 |
| commit | 3ccc3515ba251f11009cde6b4883a599ecef6863 (patch) | |
| tree | 34e639e3a6b813c28f4255f533119421669f8770 /tools/perf/scripts/python/bin/stackcollapse-report | |
| parent | 35f4e9d7530f691a5595d107c69def63b0274391 (diff) | |
| download | cachepc-linux-3ccc3515ba251f11009cde6b4883a599ecef6863.tar.gz cachepc-linux-3ccc3515ba251f11009cde6b4883a599ecef6863.zip | |
arm64: dts: imx8qm: add dma ss support
The DMA SS of MX8QM is mostly the same as the DMA part in MX8QXP ADMA SS
while it has one more instance for each of LPUART, ADC and LPI2C. And unlike
MX8QXP that flexcan clocks are shared between multiple CAN instances,
MX8QM has separate flexcan clock slice.
So we reuse the most part of common imx8-ss-dma.dtsi and add new things
based on it.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-report')
0 files changed, 0 insertions, 0 deletions