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| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2020-09-24 22:48:10 +0300 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2020-10-01 02:14:52 +0300 |
| commit | 562ad8add4064fb804e8067db2c3d4716b8274ba (patch) | |
| tree | a5955947da37437880a53b7fed82f1a206674024 /tools/perf/scripts/python/bin | |
| parent | 0dbacc89555305f2c4526b725da5e3aea64c8352 (diff) | |
| download | cachepc-linux-562ad8add4064fb804e8067db2c3d4716b8274ba.tar.gz cachepc-linux-562ad8add4064fb804e8067db2c3d4716b8274ba.zip | |
drm/i915: Implement display WA #1142:kbl,cfl,cml
Implement display w/a #1142. This supposedly fixes some underruns
with FBC+VTd. Bspec says we should use the same programming regardless
of circumstances. Apparently we should flip the magic bits before
turning on any planes so let's put this into the early w/as.
Cc: Lee Shawn C <shawn.c.lee@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200924194810.10293-1-ville.syrjala@linux.intel.com
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Diffstat (limited to 'tools/perf/scripts/python/bin')
0 files changed, 0 insertions, 0 deletions