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| author | Lan Tianyu <Tianyu.Lan@microsoft.com> | 2018-10-13 22:54:05 +0800 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2018-10-17 00:30:09 +0200 |
| commit | a5c214dad1985092bd21c38c2a78befed9b02294 (patch) | |
| tree | c9a719af737eaade79d3589cefd627898a0d3c7e /tools/perf/scripts/python/bin | |
| parent | 44c2d667ce3fa6933ac30a726f148f0c6d84ce5f (diff) | |
| download | cachepc-linux-a5c214dad1985092bd21c38c2a78befed9b02294.tar.gz cachepc-linux-a5c214dad1985092bd21c38c2a78befed9b02294.zip | |
KVM/VMX: Change hv flush logic when ept tables are mismatched.
If ept table pointers are mismatched, flushing tlb for each vcpus via
hv flush interface still helps to reduce vmexits which are triggered
by IPI and INEPT emulation.
Signed-off-by: Lan Tianyu <Tianyu.Lan@microsoft.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'tools/perf/scripts/python/bin')
0 files changed, 0 insertions, 0 deletions