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| author | Jiaxun Yang <jiaxun.yang@flygoat.com> | 2020-07-28 23:36:59 +0800 |
|---|---|---|
| committer | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2020-07-28 22:49:54 +0200 |
| commit | b91aff3b84c10c55bf848d94eda7889a8d0d171d (patch) | |
| tree | 30d011b0af9b703941a35585ea7a585bf0e84de8 /tools/perf/scripts/python/bin | |
| parent | 99b02abbcd59dffff464dc58aa21128705662ca5 (diff) | |
| download | cachepc-linux-b91aff3b84c10c55bf848d94eda7889a8d0d171d.tar.gz cachepc-linux-b91aff3b84c10c55bf848d94eda7889a8d0d171d.zip | |
MIPS: Loongson64: Add ISA node for LS7A PCH
Although currently we're not enabling any ISA device in devicetree,
but this node is required to express the ranges of address reserved
for ISA.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'tools/perf/scripts/python/bin')
0 files changed, 0 insertions, 0 deletions