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| author | Thor Thayer <thor.thayer@linux.intel.com> | 2018-06-22 13:49:36 -0500 |
|---|---|---|
| committer | Dinh Nguyen <dinguyen@kernel.org> | 2018-07-02 08:44:15 -0500 |
| commit | 84f95684d9503d7cff920c716b2c7fd5522217eb (patch) | |
| tree | 6cccc6014f84a846c0739d63d253d5aeda13d847 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | 05690e8ab29e9d144f634ffa65b8c7f765f627c9 (diff) | |
| download | cachepc-linux-84f95684d9503d7cff920c716b2c7fd5522217eb.tar.gz cachepc-linux-84f95684d9503d7cff920c716b2c7fd5522217eb.zip | |
ARM: dts: Add SPI0 node for Arria10
Add the SPI0 node for Arria10.
Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions