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| author | Finn Thain <fthain@telegraphics.com.au> | 2018-09-27 11:17:11 +1000 |
|---|---|---|
| committer | Martin K. Petersen <martin.petersen@oracle.com> | 2018-09-28 02:19:45 -0400 |
| commit | 7ef55f6744c45e3d7c85a3f74ada39b67ac741dd (patch) | |
| tree | 2e0bdfe88b70eed41d5f8468fa47c8b72dc6f25e /tools/perf/scripts/python/intel-pt-events.py | |
| parent | 070356513963be6196142acff56acc8359069fa1 (diff) | |
| download | cachepc-linux-7ef55f6744c45e3d7c85a3f74ada39b67ac741dd.tar.gz cachepc-linux-7ef55f6744c45e3d7c85a3f74ada39b67ac741dd.zip | |
scsi: NCR5380: Check for invalid reselection target
The X3T9.2 specification (draft) says, under "6.1.4.1 RESELECTION", that "the
initiator shall not respond to a RESELECTION phase if other than two SCSI ID
bits are on the DATA BUS." This issue (too many bits set) has been observed in
the wild, so add a check.
Tested-by: Michael Schmitz <schmitzmic@gmail.com>
Signed-off-by: Finn Thain <fthain@telegraphics.com.au>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Diffstat (limited to 'tools/perf/scripts/python/intel-pt-events.py')
0 files changed, 0 insertions, 0 deletions