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| author | Kai Ye <yekai13@huawei.com> | 2022-01-22 16:13:11 +0800 |
|---|---|---|
| committer | Herbert Xu <herbert@gondor.apana.org.au> | 2022-01-31 11:21:45 +1100 |
| commit | 566f060f5453e906dd4195c7e94f1fd25d2c99bb (patch) | |
| tree | 30cbe42e8625e8b1b0058d5984efc44c89f7596a /tools/perf/scripts/python | |
| parent | 5e340558c5c7f64504ef1f4d31af152f26705261 (diff) | |
| download | cachepc-linux-566f060f5453e906dd4195c7e94f1fd25d2c99bb.tar.gz cachepc-linux-566f060f5453e906dd4195c7e94f1fd25d2c99bb.zip | |
crypto: hisilicon/sec - fix the CTR mode BD configuration
The CTR counter is 32bit rollover default on the BD.
But the NIST standard is 128bit rollover. it cause the
testing failed, so need to fix the BD configuration.
Signed-off-by: Kai Ye <yekai13@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions