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| author | Colin Ian King <colin.king@canonical.com> | 2017-07-21 14:42:52 +0100 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2017-07-27 21:51:06 -0700 |
| commit | d8acde4ddbcdab4a2753660b6e5a490ad26f2f1a (patch) | |
| tree | d01541e30acd3129eba16161f76b1727b15e660d /tools/perf/scripts/python | |
| parent | ce2b0f561ce1ad18ab607d489225a24072ae0196 (diff) | |
| download | cachepc-linux-d8acde4ddbcdab4a2753660b6e5a490ad26f2f1a.tar.gz cachepc-linux-d8acde4ddbcdab4a2753660b6e5a490ad26f2f1a.zip | |
staging: rtl8192u: fix incorrect mask and shift on u8 data
The cfg_action bit comes from the high bit of pmsg[4] so the
current mask and shift are in correct and always result in
zero. Fix this by using the correct mask and shif to get the
correct cfg_action bit value.
Detected by CoverityScan, CID#142890 ("Operands don't affect result")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions