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| author | Shengzhen Li <szli@marvell.com> | 2016-06-21 14:32:32 +0530 |
|---|---|---|
| committer | Kalle Valo <kvalo@codeaurora.org> | 2016-07-05 17:30:57 +0300 |
| commit | bf942091678c51f53caa679d5fabebbe04a2ea66 (patch) | |
| tree | b73c4613b0bb8f228b48adc7dc479c8d49df4645 /tools/perf/scripts | |
| parent | 3ee712857958c27f697b33fa520fdc51e7ffea88 (diff) | |
| download | cachepc-linux-bf942091678c51f53caa679d5fabebbe04a2ea66.tar.gz cachepc-linux-bf942091678c51f53caa679d5fabebbe04a2ea66.zip | |
mwifiex: disable MSIx interrupt for 8997 chipset
Sometimes MSIx interrupts are received out of order on multi-core
system. This creates a problem when there is a race between data
packet and SLEEP event from firmware. We will disable MSIx interrupt
mode to solve the problem and go with MSI mode.
Signed-off-by: Shengzhen Li <szli@marvell.com>
Signed-off-by: Amitkumar Karwar <akarwar@marvell.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Diffstat (limited to 'tools/perf/scripts')
0 files changed, 0 insertions, 0 deletions